Activation signal output circuit and determination circuit

ABSTRACT

A start signal output circuit having an RF/DC conversion circuit to which radio frequency power (RF) of specified frequency is inputted and from which a direct current potential (DC) is outputted, comprises a detection/amplification circuit  210  which includes a voltage doubler wave-detector circuit  10  configured including a sensing diode Q 1  (Tr 34 ) for sensing the RF power, a differential amplifier including differential pair transistors Tr 31  and Tr 32 , and a current mirror circuit. A base current of one Tr 31  of the differential pair transistors is brought into substantial agreement with a DC component of a current flowing through the sensing diode Q 1  (Tr 34 ). A total of currents flowing through the differential pair transistors Tr 31  and Tr 32  is regulated to a substantially constant value by the current mirror circuit. Thus, the start signal output circuit which is small in size, high in sensitivity and low in power consumption can be realized.

TECHNICAL FIELD

The present invention relates to a start signal output circuit having anRF/DC conversion circuit, which inputs radio frequency power (RF) ofspecified frequency and outputs direct current potential (DC), and adetermination circuit very useful for the start signal output circuitand the like.

Herein, the direct current potential (DC) signifies an output potentialwhich is generated on the basis of a detection potential from a sensingdiode as developing during a time period for which the level (amplitude)of a waveform determined by the envelope of the waveform of the radiofrequency power (RF) has a substantially constant value or above.

Accordingly, in a case where the RF power arrives intermittently orwhere the arrival is periodic, the waveform of the DC potential canbecome periodic. Even in a case, for example, where the DC potentialfluctuates periodically or intermittently in such a manner, the presentinvention is, of course, useful.

That is, in the case where the power level itself of the RF power to bedetected is fluctuant or intermittent, the DC potential is consequentlyfluctuant or intermittent. Hereinbelow, such a potential shall beincluded in the above DC potential.

BACKGROUND ART

Inventions described in Japanese Patent No. 2,561,023, Japanese PatentNo. 2,605,827, and JP-A-4-291167 relate to radio-frequency detectiontechniques based on diode wave detection. FIGS. 36 and 37 are circuitdiagrams exemplifying radio-frequency detection circuits in the priorart. In order to convert radio frequency power into a direct current, ahalf-wave rectification operation achieved by a diode D in FIG. 36 orFIG. 37 is utilized by way of example. On this occasion, in order tolimit a DC bias to, for example, about 1 μA in consideration of lowpower consumption, a resistor in the order of several MΩ is required asa resistor for use in the detection circuit, in either of the cases ofFIGS. 36 and 37 when a supply voltage of 3 V is employed.

FIG. 38 is a circuit diagram exemplifying the arrangement of a generalor typical start signal output circuit in the prior art, and the circuitarrangement is such that the wave-detector circuit in FIG. 37 and ageneral differential amplifier are combined. Regarding such a prior artdevice, applications are also found in, for example, Japanese Patent No.3,202,624 and JP-A-10-56333. In the circuit arrangement in FIG. 38, acapacitor C₀₀ in FIG. 37 is arranged in series on a signal transfer linewithin a matching circuit (MC).

Meanwhile, as a prior art determination circuit which determines thelevel of an input potential, there has been generally and widely known,for example, a circuit which is described in “Guide to Electroniccircuit Work for Learning by Fabrication” (authored by Seiichi Inoue andpublished by Sougou-Denshi Shuppan). Shown in FIGS. 39A and 39B is aprior art determination circuit (a wave-detector and detection circuit).Further, FIG. 39C is a waveform diagram showing the situation of thechange of the output of the detection circuit shown in the circuitdiagram of FIG. 39B. This circuit diagram shows the detection circuit ofan ultrasonic distance measurement apparatus. As shown in FIG. 39B byway of example, a determination process in the prior art is executed bya comparator which is configured using an operational amplifier thatrequires a current of mA order.

Under the premise of a battery operation or the like, however, loweringpower consumption as desired is difficult when the operational amplifierrequiring the current of mA order is adopted. Further, when well-knownheterodyne wave detection, for example, is performed, radio wave powerat a low level of about −60 dBm can be detected. In such an apparatus,however, a signal generator, a LNA, a mixer, etc. must be alwaysoperated, and power consumption during a standby time period istherefore difficult to be suppressed. Thus, the target lower powerconsumption is not attained, either. On the other hand, the prior artsensing scheme based on the diode is difficult to enhance a sensingsensitivity. These circumstances will be major causes for makingdifficult the compatibility between the higher sensitivity and lowerpower consumption of the wave-detector circuit.

Moreover, in order to manufacture and put into practical use a startsignal output circuit of wider applications, the following two problemswill need be solved in addition to the above various problems:

(1) Problem of Adaptability to Temperature Environment

In a case where the start signal output circuit is to be utilized for,for example, an ETC or a “smart plate,” it should desirably beapplicable within a temperature range of about −30° C. to +60° C.

(a) Immunity Against Lowering of Supply Voltage

FIG. 40 is a graph exemplifying the discharge-temperaturecharacteristics of a lithium battery which is commercially available.The battery is a cylindrical manganese-dioxide lithium battery. Itsnominal voltage is 3 V, supposed continuous standard load is 20 mA, andservice temperature range is −40° C. to +70° C. Shown in the graph areresults obtained when, with a discharge load set at 60ω, outputpotentials were measured over about 30 hours. As seen from FIG. 40, theoutput voltage of the dry cell depends greatly upon the temperature, andit becomes drastically lower than the initial voltage of the battery atnormal temperatures, in some situations of use thereof.

It is accordingly understood that, in a case where the battery operationis intended, especially in a case where the use of the battery in a colddistrict, for example, is also supposed for the desired start signaloutput circuit, an intense immunity against the lowering of the supplyvoltage is required.

Meanwhile, when a circuit operation is considered, the DC component ofthe sensing diode need be amplified in the start signal output circuit.Therefore, the output point P1 of the diode detection circuit and theinput point P2 of the amplifier in the prior art example (FIG. 38) needbe directly connected. As a result, the biases of the sensing diode andamplifier cannot be made independent. Accordingly, in order to hold asensed output constant even when the supply voltage Vcc fed by thebattery has lowered, the potential of the output point P1 of the diodedetection circuit, the potential of the input point P2 on the amplifierside and the bias voltage Vbb for use in the amplifier need be loweredwith the lowering of the supply voltage versus time, while they arealways kept in balanced fashion.

In, for example, the start signal output circuit 900 shown in FIG. 38,even in a case where the resistances of resistors R1 and R2 are properlyset so that the diode detection circuit and the amplifier mayappropriately operate at a certain value of the supply voltage Vcc, abiased state changes when the supply voltage Vcc lowers.

On this occasion, however, unless the bias of the amplifier properlylowers in balanced fashion likewise to the bias of the diode detectioncircuit, the start signal output circuit 900 does not appropriatelyoperate as a whole when the supply voltage Vcc lowers greatly. That is,the circuit of the prior art arrangement (example: start signal outputcircuit 900 in FIG. 38), which does not have a flexible correspondingmechanism (balancing function) capable of coping with such a problemrelevant to the lowering of the output voltage of the power supply, isapprehended to erroneously operate in some cases.

Even if a precise operation is possible, the appropriate range of thesupply voltage on that occasion narrows, and hence, a serviceable timeperiod shortens in the case of using the battery as the power supply.

(b) Immunity Against Noise

Further, in a high-temperature environment, thermal noise, flickernoise, etc. are liable to develop within a circuit as is often observedin case of using, for example, MOSFETs for the circuit. Therefore, thestart signal output circuit needs to have a predetermined immunityagainst the noises which develop within the circuit. That is, in orderto realize the start signal output circuit whose sensitivity is higheven in the environment of, for example, the wide range of temperaturesas described above, a high S/N ratio need be secured in relation to theinternal noises.

(2) Problem of Power Consumption of Determination Circuit

The determination circuit is required to determine ON/OFF (whether ornot a signal has arrived) after the conversion from the RF into the DC.As also seen from the foregoing circuit arrangement in FIG. 39B, theaddition of such a determination circuit leads to increase of powerconsumption. That is, it is not easy to operate the desired start signaloutput circuit as a whole, always at a low voltage and at a low current.

Considered as peripheral devices which require currents of mA order ascan be supposed in the case of fabricating the RF/DC converter are, forexample, a DC—DC converter or a regulator for ensuring a bias voltage,and an operational amplifier or a voltage comparator for amplifying andbinarizing a result outputted from the RF/DC converter. However, when anapparatus configuration in which also the peripheral devices must bealways operated is adopted, the start signal output circuit of very lowpower consumption cannot be eventually constructed as the wholeapparatus.

Moreover, such a problem becomes an issue or is actualized especially incases of battery drive, etc. In order to suppress the power consumptionof the whole circuit to a low level, accordingly, the start signaloutput circuit will need to include a special determination circuit oflow power consumption by itself.

Further, the problem of a high resistance need be taken intoconsideration. When the high resistance of about several MΩ is formed onan IC chip as shown in FIG. 37 by way of example, the resistance elementbecomes long, and hence, a large space is necessitated. As a result, thearea of the resistance element facing the ground enlarges. Thus, aparasitic capacitance and a parasitic resistance appear between theresistance on the chip and the ground within a substrate, and radiofrequency power leaks to the substrate. With such a simpleconfiguration, therefore, radio frequency power at, for example, afrequency of 5.8 GHz and a low level of −60 dBm cannot be converted intoa direct current by the diode.

Further, as other problems concerning the diode wave detection, it ispointed out that, in a case where the load resistance becomes high, theapplied voltage between the anode and cathode of the diode becomessmall, so radio frequency power cannot be converted into a directcurrent, and that, even in a case where the radio frequency power issuccessfully converted into the direct current, it is indistinguishablewhether the output potential fluctuation of the diode is ascribable tothe fluctuation of a bias or the DC conversion of the RF power.

The present invention is made in order to solve the above problems, andhas an object to realize a start signal output circuit which is small insize, high in sensitivity and low in power consumption.

A further object of the invention is to realize a start signal outputcircuit whose serviceable temperature range is wide even in case ofbattery drive.

However, each object mentioned above may be individually accomplished byany and at least one of inventions to be described later, and theindividual inventions of the present application shall not necessarilyguarantee that means capable of simultaneously solving all the aboveproblems be existent.

DISCLOSURE OF THE INVENTION

The first invention of the present application resides in a start signaloutput circuit having an RF/DC conversion circuit to which radiofrequency power (RF) of specified frequency is inputted and from which adirect current potential (DC) is outputted. This conversion circuitincludes a detection/amplification circuit which includes a sensingdiode Q1 for sensing the radio frequency power; a transistor TrL foramplifying a direct current component I_(Q1) of a current outputted bythe sensing diode Q1; and a current mirror circuit including thetransistor TrL as a circuit element; a base current I_(B) of thetransistor TrL being in substantial agreement with the direct currentcomponent I_(Q1); an emitter current I_(E) of the transistor TrL beingconfined by the current mirror circuit.

Further, the second invention of the present application resides in, inthe current mirror circuit in the first invention, a referencetransistor which has its emitter terminal connected to a predeterminedground point or feed point, and which is endowed with a predeterminedload, thereby to determine a current quantity of the whole start signaloutput circuit; and a plurality of subsidiary transistors which havetheir emitter terminals connected to the emitter terminal of thereference transistor, and which have their base terminals connected to abase terminal of the reference transistor, thereby to pass currents inquantities substantially identical to a current quantity of thereference transistor, respectively.

Further, the third invention of the present application resides in, inthe first or second invention, a differential amplifier. A transistorTrL forms one of differential pair transistors which are arranged in asignal input portion of the differential amplifier. A total of currentsflowing through the differential amplifier is regulated to asubstantially constant value by the current mirror circuit.

Further, the fourth invention of the present application resides in, inthe third invention, a non-sensing diode Q2 which does not sense theradio frequency power. This diode Q2 is disposed in substantial symmetryto the sensing diode Q1 at least logically. While the radio frequencypower is not inputted to the start signal output circuit, a cathodeterminal of the non-sensing diode Q2 outputs the same voltage as acathode terminal voltage of the sensing diode Q1, to a base terminal ofthe other TrR of the differential pair transistors.

The expression “in substantial symmetry at least logically” heresignifies that a circuit need not always be in substantial symmetryphysically, but that a circuit form which is substantially symmetric ona circuit diagram suffices.

Further, the fifth invention of the present application resides in that,in the fourth invention, a whole circuit of a differential circuitcentering around the differential amplifier is configured in substantialsymmetry.

Further, the sixth invention of the present application resides in that,in any of the third through fifth inventions, active loads of currentmirror circuit are configured of two MOSFETs adopted as loads of thedifferential amplifier.

Further, the seventh invention of the present application resides inthat, in the sixth invention, each of the MOSFETs is set at a gatelength of at least 1 μm, and at a gate width of at least 2 μm.

Further, the eighth invention of the present application resides in, inany of the first through seventh inventions, a matching circuit, whichis connected to the first terminal side of the sensing diode Q1 to whichthe radio frequency power is inputted, for efficiently inputting theradio frequency power.

Further, the ninth invention of the present application resides in that,in any of the first through eighth inventions, a stub or a resonator isconnected to that second terminal side of the sensing diode Q1 to whichthe radio frequency power is outputted, so that both terminals of thestub or the resonator may be short-circuited for the specifiedfrequency.

Further, the tenth invention of the present application resides in that,in any of the first through ninth inventions, the sensing diode Q1 isconstructed of a transistor of N-P-N type or P-N-P type whose base andcollector are directly connected as that first terminal of the sensingdiode Q1 to which the radio frequency power is inputted, and whoseemitter is used as that second terminal of the sensing diode Q1 to whichthe radio frequency power is outputted.

Further, the eleventh invention of the present application resides in,in any of the first through tenth inventions, thedetection/amplification circuit includes a voltage doubler wave-detectorcircuit which is configured in such a way that an output end of acapacitor C1 located in an input portion for the radio frequency power,and a cathode end of a diode D1 having its anode end groundedradio-frequency-wise are connected to an anode end of the sensing diodeQ1, and that one end of a capacitor C2 having its other end groundedradio-frequency-wise is connected to a cathode end of the sensing diodeQ1.

Herein, the capacitor C1 may be arranged between thedetection/amplification circuit and a predetermined matching circuit, itmay be constructed as the radio frequency power input portion of thedetection/amplification circuit, or it may be constructed as part of apredetermined matching circuit. Such discrimination ends in the problemof the mere definition (division) of what the matching circuit extendsto or what the detection/amplification circuit extends from.

Further, the twelfth invention of the present application resides inthat, in any of the first through eleventh inventions, a binarizationcircuit using CMOS is disposed at a succeeding stage of the start signaloutput circuit, and an output signal of the start signal output circuitis binarized by the binarization circuit.

Further, the thirteenth invention of the present application resides ina determination circuit which is configured including a differentialamplifier that is in substantial symmetry logically, and which comparesan input level with a reference potential. The determination circuit ischaracterized in that regarding a pair of load resistances Ra and Rbwhich oppose to each other in substantial symmetry at least logically,and which regulate currents to flow through the differential amplifier,while constituting a load portion of the differential amplifier, theload resistance Ra on an input fluctuation side whose input levelfluctuates in correspondence with existence or nonexistence of an inputof the radio frequency power is set lower than the load resistance Rb ona determination criterion input side.

Further, the fourteenth invention of the present application resides inthat, in the thirteenth invention, a difference ΔR (≡Rb−Ra>0) betweenthe load resistance Ra and the load resistance Rb is adjusted asdesired, thereby to freely set a sensitivity of an output potential toan input potential.

Further, the fifteenth invention of the present application resides inthat, in a determination circuit which is configured including adifferential amplifier that is in substantial symmetry logically, andwhich compares an input level with a reference potential, a load portionof the differential amplifier for regulating currents to flow throughthe differential amplifier has a current mirror circuit configuration,and the load portion is configured of asymmetric active loads.

Further, the sixteenth invention of the present application resides inthat, in the fifteenth invention, the active loads consist of twobipolar transistors.

Further, the seventeenth invention of the present application resides inthat, in any of the thirteenth through sixteenth inventions, thedifferential amplifier includes two sets of amplification circuits eachof which is configured by Darlington-connected two transistors, the twosets being opposed to each other in substantial symmetry at leastlogically.

Further, the eighteenth invention of the present application resides inthat, in any of the thirteenth through seventeenth inventions, abinarization circuit using CMOS is disposed at a succeeding stage of thedetermination circuit, and the binarization circuit binarizes adetermined result outputted by the determination circuit.

Further, the nineteenth invention of the present application resides inthat, in a start signal output circuit having an RF/DC conversioncircuit to which radio frequency power (RF) of specified frequency isinputted, and from which a direct current potential (DC) is outputted,the determination circuit defined in any of the thirteenth througheighteenth inventions is provided.

Further, the twentieth invention of the present application resides inthat, in any of the first through twelfth inventions, the determinationcircuit as defined in any of the thirteenth through eighteenthembodiments is provided.

Further, the twenty-first invention of the present application residesin that, in any of the first through twelfth inventions or in thenineteenth or twentieth invention, a low-pass filter or a low-bandamplification circuit using a stub, a resonator, an inductor or asmoothing capacitor is provided. Thus, regarding a transfer function ofthe direct current potential (DC) for a detected potential (δv) of thesensing diode Q1, a low-pass filter characteristic of narrow band asabruptly monotonously decreases especially in a vicinity of a directcurrent versus frequency values is afforded.

Owing to the above inventions of the present application, the problemsdescribed above can be solved effectively or reasonably. Advantageswhich are attained by the inventions of the present application are asdescribed below.

As the most important featuring part of the present invention, it is ofimportance (major feature 1) that the wave-detector circuit isincorporated into the differential amplifier by adopting the circuitarrangement in which the diode for regulating the bias voltage or biascurrent of the differential amplifier is used also as the sensing diode,and (major feature 2) that the bias current of the wave-detector circuitis configured by using the current mirror circuit.

Now, in conformity with the sequence in which the individual inventionsare stated, the major feature 2 which is provided by the first andsecond inventions of the present application will be first describedbefore the description of the functions and advantages of the majorfeature 1.

According to the first invention of the present application, biascurrents which flow through the sensing diode Q1 and the transistor TrLare stably controlled by constant currents which are determined by thecurrent mirror circuit. That is, the above circuit elements are operatedby the currents which are stably fed by the current mirror circuit fromthe single supply voltage, so that even when the bias currents lowersdue to the lowering of the supply voltage, the circuit elements are fedwith the bias currents which have lowered relatively. As a result, theoperable lower-limit value of the supply voltage can be made lower.Therefore, the start signal output circuit becomes immune againsttemperature changes, and the operable time period thereof can belengthened.

Further, the transistor TrL and the sensing diode Q1 are connected sothat the base current of the transistor TrL may become the current whichflows through the sensing diode Q1. Therefore, the bias current flowingthrough the sensing diode Q1 can be decreased to 1/(currentamplification factor β) of the current to flow through the transistorTrL. That is, the current to flow through the transistor TrL is limitedto a small value by the current mirror circuit, whereby the bias currentof the sensing diode Q1 can be controlled to the very small value equalto 1/β of the limited current value, and a stable control is permittedby the current mirror circuit. As a result, a region of highernonlinearity in the V-I characteristic of the sensing diode Q1 can beused, and hence, the rectified value of radio frequency power enlarges.That is, detection sensitivity can be enhanced.

Further, to make the bias current of the sensing diode Q1 very small bythe configuration is equivalent to make the load resistance of thesensing diode Q1 very large. Herein, since the load resistance isrealized by the connectional relation of the sensing diode Q1 and thetransistor TrL, the large load resistance is successfully formed by aminute area, and a stray capacitance which forms a cause for loweringthe sensitivity can be decreased.

Thus, according to the first invention of the present application, it isnot necessary to employ the large-area resistance of MΩ order asdescribed above, having the parasitic components, so that the problem ofthe radio frequency leakage can be eliminated.

By way of example, the current mirror circuit can be realized byincluding as in the second invention of the present application, thereference transistor which determines the current quantity of the wholestart signal output circuit by having its emitter terminal connected tothe predetermined ground point or feed point and being endowed with thepredetermined load, and the plurality of subsidiary transistors whichpass currents in quantities substantially identical to the currentquantity of the reference transistor, respectively, by having theiremitter terminals connected to the emitter terminal of the referencetransistor and having their base terminals connected to the baseterminal of the reference transistor.

The transistor Tr6 in FIG. 1, for example, forms part of the currentmirror circuit, and it determines the current of the current mirrorcircuit. Hereinbelow, such a transistor (Tr6) shall be referred to asthe “reference transistor” of the current mirror circuit. Further,transistors which pass the currents in substantially the identicalquantities in conformity with the reference transistor (Tr6) in thecurrent mirror circuit, for example, the transistors Tr5, Tr9 and Tr11in FIG. 1, shall be referred to as the “subsidiary transistors” of thecurrent mirror circuit.

Now, the major feature 1 described above will be described.

According to the third invention of the present application, thedifferential amplifier is disposed, and the transistor TrL is set as oneof the differential pair transistors of the differential amplifier. Thetotal of currents which flow through the differential amplifier iscontrolled to be constant by a current mirror circuit. As in the firstinvention, therefore, bias currents which flow through the differentialamplifier that includes the sensing diode Q1 and the transistor TrL canbe stably controlled by the current mirror circuit. Consequently, thebias currents can be fed to the differential amplifier on the basis ofthe single supply voltage while being stabilized by the current mirrorcircuit, with the result that the biases of the individual circuitelements change uniformly in accordance with a supply voltagefluctuation. Accordingly, the same advantages as in the first inventionare achieved. Further, owing to the use of the differential amplifier,the DC voltage rectified by the sensing diode Q1 can be detected as adifference from the reference voltage which changes in correspondencewith the supply voltage, so that the detection sensitivity for the radiofrequency signal is enhanced, and the stability of the detection againstthe supply voltage fluctuation is enhanced.

Further, according to the fourth invention of the present application,in bestowing the reference voltage on the differential amplifier, thenon-sensing diode Q2 which does not sense the radio frequency power isconnected to the differential amplifier in symmetry to the sensing diodeQ1 circuit-wise. Therefore, the differential output can be set as a zeroreference during a time period for which the radio frequency signal isnot detected. Further, both the sensed voltage based on the sensingdiode Q1 and the reference voltage change similarly in correspondencewith the fluctuation of the supply voltage and the temperaturefluctuation, so that the components of the fluctuations are not involvedin the differential output which is determined on the basis of both thevoltages, and the detection precision is enhanced. As a result, theoperable lower-limit value of the supply voltage can be made stilllower.

That is, according to the fourth invention of the present application,in the case where the differential amplifier is introduced into thedetection/amplification circuit (wave detection/amplification circuit),both the bias potentials of the differential pair transistors during thetime period for which the radio frequency power does not arrive can bealways brought into substantial agreement. Therefore, the undesiredinfluences of the drift of the supply voltage on both the biaspotentials can be reliably excluded.

However, the circuit arrangement centering around the differentialamplifier need not always be a symmetric configuration as exemplified inFIG. 2. In, for example, the circuit arrangement centering around thedifferential amplifier in FIG. 2, parts enclosed with broken lines(smoothing capacitors Ca and resonators Reso) are located in bilateralarrangement on the basis of the fifth invention of the presentapplication, but the smoothing capacitor Ca and the resonator Reso whichare connected to the base terminal of the right transistor TrR of thedifferential pair transistors are not always required.

Essentially important here is that both the bias potentials of thedifferential pair transistors during the time period for which the radiofrequency power does not arrive are held in approximate agreement. Ofcourse, it is ideal that both the bias potentials are in substantialagreement, but it suffices that they lie within a range in which thecircuit operates normally. The resistances of elements having resistorswhich afford the bias. potentials and which are located in series on apower feed path are held in substantial agreement by, for example,configuring the employed elements in bilateral symmetry as in the fifthinvention, whereby both the bias potentials of the differential pairtransistors during the time period for which the radio frequency powerdoes not arrive come into substantial agreement surely.

Further, to be strict, the resistances of the elements having suchresistors exhibit temperature dependencies. However, when the elementswhich determine the resistances on the power feed path as afford thebias potentials are located in bilateral symmetry, both the biaspotentials of the differential pair transistors always become the samepotentials surely during the time period for which the radio frequencypower does not arrive. Therefore, it is possible to reliably avoid thedrawback as described above that the sign of the difference ((detectionside DC)−(referential DC)) of the output potentials is unreasonablyreversed due to a drift factor such as the drop of the supply potential.

Further, according to the fifth invention of the present application, itbecomes very simple to design the detection/amplification circuit (wavedetection/amplification circuit) which is configured centering aroundthe differential amplifier. Also, according to the fifth invention ofthe present application, the functions and advantages based on thefourth invention can be surely attained owing to the symmetry of thecircuit.

Further, according to the sixth invention of the present application,the loads of the differential amplifier can be effectively constructedwithout employing high resistances of large areas.

Further, according to such a configuration, currents (load currents)flowing toward the differential pair transistors on the detectionpotential side and the comparison reference side can be alwayscontrolled to the same quantities.

Further, regarding MOSFETs, it is well known that flicker noise isheavy. In particular, it is known from, for example, “RF CMOS circuitdesign technology” (written by Nobuyuki Itoh, and published byKabushiki-Kaisha Triceps) that the enlargements of gate lengths and gatewidths are effective as a countermeasure for lowering the flicker noiseby means other than fabricating methods in a manufacturing process. Thatis, according to the seventh invention of the present application, theflicker noise of the MOSFETs can be effectively suppressed.

Further, in accordance with the eighth invention and ninth invention ofthe present application, the configuration in which the sensing diode isinterposed between, for example, the matching circuit and the resonatoris adopted, whereby desired radio frequency power can be efficientlyapplied to the first terminal side to which the radio frequency power ofthe sensing diode is inputted.

Further, according to the tenth invention of the present application,the high versatility of the circuit arrangement can be secured. That is,the tenth invention has such wide range of applications that the startsignal output circuit can be performed even when transistors of P-N-Ptype are employed for the sensing diode, etc.

Exemplified in FIG. 1 is the circuit form in which transistors of N-P-Ntype are adopted for the sensing diode, the reference transistor and thesubsidiary transistors. However, in a case where the transistors of theP-N-P type are substantially similarly employed for the sensing diode,reference transistor and subsidiary transistors, and where thealterations of the circuit arrangement, such as the replacement of thefeed point and the ground point, are made, the current mirror circuit inwhich the directions of current flows are reversed to those in FIG. 1can also be configured. In such a case, the emitter terminal of thereference transistor is connected to the predetermined feed point,whereby the desired start signal output circuit can be similarlyconfigured.

Further, according to the eleventh invention of the present application,as illustratively explained in, for example, “Design and Manufacture ofRadio frequency circuit” (written by Kenji Suzuki, and published by CQPublishing Co., Ltd.), a high detection sensitivity can be attained bythe voltage doubler rectification operation which is based on thebooster circuit (voltage doubler rectification circuit) employing thesensing diode as one (boosting diode) of circuit elements.

Further, according to the twelfth invention of the present application,the binarization circuit can be configured at low power consumption, sothat the start signal output circuit which is of low power consumptionas the whole can also be realized. That is, according to the twelfthinvention, the circuits preceding to the binarization circuit, such asthe detection/amplification circuit, can be enhanced in performance bythe configuration of the low power consumption, so that the CMOS circuitrequiring the DC potential input of high level can also be employed forthe succeeding binarization circuit.

Further, according to the thirteenth invention of the presentapplication, in the determination circuit, it is permitted orfacilitated that the relation between the magnitudes of thedetermination criterion potential and the detection potential, in twooutputs which fluctuate in accordance with the existence or nonexistenceof the arrival (detection) of radio frequency power, be greatly invertedon the basis of the existence or nonexistence. With such settings,accordingly, it is permitted or facilitated to enhance the detectionsensitivity or to sharply decrease erroneous detection. Further, withsuch settings, it is permitted or facilitated to effectively suppressthe number of transistors to be used and power consumption in the wholestart signal output circuit.

Further, according to the fourteenth invention of the presentapplication, the sensitivity of the output potential to the inputpotential can be freely set. When the offset (difference ΔR≡Rb−Ra>0) ismade excessively large, the detection sensitivity becomes dull. When itis made excessively small, the erroneous detection becomes liable tooccur due to noise. The offset (difference ΔR) should desirably be setat a value which is equal to about ⅓–⅔ of a detection potential δv thatcorresponds to an intensity (standard detection level) to serve as thestandard of desired radio frequency power.

Further, the determination circuit affords determination means which isvery effective for the start signal output circuit having the RF/DCconversion circuit, and hence, according to the nineteenth or twentiethinvention of the present application, it is permitted or facilitated toconfigure the start signal output circuit of very low power consumption.

Further, according to the twenty-first invention of the presentapplication, the low-pass filtering and amplification are attained onlyin the vicinity of the direct current with respect to frequency values.The other noises can therefore be effectively eliminated, so that asensitivity can be enhanced much more than in the prior art diode wavedetection.

In a case where these configurations are realized by analog circuits oflow power consumption, the transfer function usually becomes amonotonous decrease function versus the frequency.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram of a start signal output circuit 100 in thefirst embodiment.

FIG. 2 is a circuit diagram of a detection/amplification circuit 110 ofthe start signal output circuit 100 in the first embodiment.

FIG. 3 is a circuit diagram of a determination circuit 120 of the startsignal output circuit 100 in the first embodiment.

FIG. 4 is a graph exemplifying the output voltage of the start signaloutput circuit 100 versus the input power thereof.

FIG. 5 is a graph exemplifying the output voltage of a start signaloutput circuit 100′ (Ra=Rb) for comparison, versus the input powerthereof.

FIG. 6 is a graph exemplifying the output characteristics of the startsignal output circuit 100 versus the supply voltage thereof.

FIG. 7 is a graph exemplifying the supply current of the start signaloutput circuit 100 versus the supply voltage thereof.

FIG. 8 is a graph exemplifying the transfer function of the detectionpotential (δV) of a sensing diode in the start signal output circuit100, versus the frequency.

FIG. 9 is a circuit diagram of the start signal output circuit 100′.

FIG. 10A is a graph showing the input DC potential of the determinationcircuit 120 in the first embodiment.

FIG. 10B is a graph showing the spectrum (computed values) of the inputnoise of the determination circuit 120 in the first embodiment.

FIG. 11A is a graph showing the output DC potential of the determinationcircuit 120 in the embodiment.

FIG. 11B is a graph showing the spectrum of the output noise of thedetermination circuit 120.

FIG. 12A is a graph obtained by modeling the input waveform of thedetermination circuit 120 with the conditions of FIGS. 10A and 10Bpremised.

FIG. 12B is a graph obtained by modeling the output characteristic (S/Nratio) of the determination circuit 120 with the conditions of FIGS. 11Aand 11B premised.

FIG. 13 is a circuit diagram of a start signal output circuit 200 in thesecond embodiment.

FIG. 14 is a circuit diagram of a detection/amplification circuit 210which is included in the start signal output circuit 200 of the secondembodiment.

FIG. 15 is a circuit diagram of a conventional voltage doublerwave-detector circuit 10.

FIG. 16A is a circuit diagram of a wave-detector circuit which isincluded in the detection/amplification circuit 110 of the start signaloutput circuit 100.

FIG. 16B is a circuit diagram of the wave-detector circuit which isincluded in the detection/amplification circuit 210 of the start signaloutput circuit 200.

FIG. 17 is a circuit diagram of the preceding stage(detection/amplification circuit 210) and intermediate stage(determination circuit 220) of the start signal output circuit 200.

FIG. 18 is a circuit diagram of an equivalent circuit to active loadswhich are included in the determination circuit 220.

FIG. 19 is a graph showing the potential changes of points a and b inFIG. 17.

FIG. 20 is a circuit diagram exemplifying a modified embodiment of thedetermination circuit 220 (a determination circuit 220′).

FIG. 21 is a circuit diagram of a start signal output circuit 203 in thesecond embodiment.

FIG. 22A is a graph showing the input DC potential of an amplificationcircuit 220″ in the second embodiment.

FIG. 22B is a graph showing the spectrum (computed values) of the inputnoise of the amplification circuit 220″ in the second embodiment.

FIG. 23A is a graph showing the output DC potential of the amplificationcircuit 220″.

FIG. 23B is a graph showing the spectrum of the output noise of theamplification circuit 220″.

FIG. 24A is a graph obtained by modeling the input waveform of theamplification circuit 220″ with the conditions of FIGS. 22A and 22Bpremised.

FIG. 24B is a graph obtained by modeling the output characteristic (S/Nratio) of the amplification circuit 220″ with the conditions of FIGS.23A and 23B premised.

FIG. 25 is a circuit diagram exemplifying a determination circuit 222 inthe third embodiment.

FIG. 26 is a circuit diagram of a start signal output circuit 202 in thethird embodiment.

FIG. 27A is a graph showing the input DC potential of the determinationcircuit 222 in the third embodiment.

FIG. 27B is a graph showing the spectrum (computed values) of the inputnoise of the determination circuit 222 in the third embodiment.

FIG. 28A is a graph showing the output DC potential of the determinationcircuit 222.

FIG. 28B is a graph showing the spectrum of the output noise of thedetermination circuit 222.

FIG. 29A is a graph obtained by modeling the input waveform of thedetermination circuit 222 with the conditions of FIGS. 27A and 27Bpremised.

FIG. 29B is a graph obtained by modeling the output characteristic (SINratio) of the determination circuit 222 with the conditions of FIGS. 28Aand 28B premised.

FIG. 30 is a circuit diagram of a start signal output circuit 201 in thefourth embodiment.

FIG. 31A is a graph showing the input DC potential of a determinationcircuit 220 in the fourth embodiment.

FIG. 31B is a graph showing the spectrum (computed values) of the inputnoise of the determination circuit 220 in the fourth embodiment.

FIG. 32A is a graph showing the output DC potential of the determinationcircuit 220.

FIG. 32B is a graph showing the spectrum of the output noise of thedetermination circuit 220.

FIG. 33A is a graph obtained by modeling the input waveform of thedetermination circuit 220 with the conditions of FIGS. 31A and 31Bpremised.

FIG. 33B is a graph obtained by modeling the output characteristic (S/Nratio) of the determination circuit 220 with the conditions of FIGS. 32Aand 32B premised.

FIG. 34 is a circuit diagram of the whole start signal output circuit301 in the fifth embodiment.

FIG. 35 is a circuit diagram of the detection/amplification circuit 310of a start signal output circuit 301 in the fifth embodiment.

FIG. 36 is a circuit diagram exemplifying a radio-frequency detectioncircuit in the prior art.

FIG. 37 is a circuit diagram exemplifying the radio-frequency detectioncircuit in the prior art.

FIG. 38 is a circuit diagram exemplifying a general start signal outputcircuit (900) in the prior art.

FIG. 39A is a circuit diagram exemplifying a wave-detector and detectioncircuit in the prior art.

FIG. 39B is a circuit diagram exemplifying a detection circuit in theprior art.

FIG. 39C is a waveform diagram showing the situation of the change ofthe output of the detection circuit shown in the circuit diagram of FIG.39B.

FIG. 40 is a graph exemplifying the temperature characteristics of alithium dry cell which is commercially available.

FIG. 41 is a circuit diagram of a known binarization circuit whichresembles the determined-result binarization circuit 130 of the startsignal output circuit 100.

BEST MODE FOR CARRYING OUT THE INVENTION

Now, the present invention will be described in conjunction withpracticable embodiments. The mode for carrying out the invention,however, is not restricted to the individual embodiments given below.

(First Embodiment)

FIG. 1 is a circuit diagram of a start signal output circuit 100 in thisembodiment. The start signal output circuit 100 includes an RF/DCconversion circuit to which radio frequency power (RF) of specifiedfrequency is inputted and from which a direct current potential (DC) isoutputted.

<Outline of Functions of Whole Start Signal Output Circuit 100>

In the start signal output circuit 100, input power (radio frequency) isfirst converted into a DC via a matching circuit, a sensing diode Q1 anda low-pass filter (Reso, Ca), and the DC is amplified by a transistorTrL of differential pair transistors, thereby to amplify the potentialdifference between the collector terminals of the differential pairtransistors TrL and TrR. The potential of the base terminal of thetransistor TrR is internally set by employing the fifth invention of thepresent application.

In a determination circuit 120 at a succeeding stage, a threshold value(offset) is set for the DC potential thus detected and amplified in andoutputted from a detection/amplification circuit 110. When the outputtedDC potential exceeds the threshold voltage (offset), an output stage (adetermined-result binarization circuit 130) becomes saturated, and anexcitation potential (=start signal) at substantially the same level orin substantially the same order as that of a supply voltage can beobtained.

<Outline of Arrangement of Whole Start Signal Output Circuit 100>

A transistor Tr6 in the start signal output circuit 100 forms part of acurrent mirror circuit. It determines the current of the current mirrorcircuit. As described above, such a transistor (Tr6) is referred to as a“reference transistor” of the current mirror circuit. The start signaloutput circuit 100 is mainly configured of the detection/amplificationcircuit 110, the determination circuit 120, a determined-resultbinarization circuit 130, and an LC filter section 140. Further, sincethe current mirror circuit is utilized as described above, the supplyvoltage to be prepared consists only of a positive potential Vcc in thefigure as can be provided by, for example, a battery, and a special biaspower supply circuit or the like for providing any other potential isnot required at all.

The start signal output circuit 100 in FIG. 1 forms a multiple outputtype having a plurality of subsidiary transistors. Similar to atransistor Tr5, transistors Tr9, Tr11, Tr13 and Tr20 are the subsidiarytransistors whose reference transistor is the transistor Tr6.

Further, in order to enhance a sensing precision, the start signaloutput circuit 100 is designed so that almost only the DC component ofthe potential outputted by the detection diode Q1 may be amplifiedthrough the whole circuit.

(Configurations of Respective Stages)

1. Preceding Stage (Detection/Amplification Circuit 110)

FIG. 2 is a circuit diagram of the detection/amplification circuit 110of the start signal output circuit 100. The current mirror circuit whichconstitutes the outline of the start signal output circuit 100 in FIGS.1 and 2 forms the multiple output type which has the plurality ofsubsidiary transistors (Tr5, Tr9, . . . ) conforming to one referencetransistor (Tr6).

Further, the matching circuit MC for efficiently inputting the radiofrequency power is connected on the first terminal side to which theradio frequency power of the sensing diode Q1 is inputted. The matchingcircuit MC has a well-known configuration, and it may well have a knownconfiguration as shown by way of example in the fifth embodiment (FIG.35) to be described later. Alternatively, a matching circuit in awell-known or desired appropriate aspect may well be used as such amatching circuit.

In the detection/amplification circuit 110, it is characterized in thatthe sensing diode serves also as a diode which regulates the biasvoltage of the differential pair transistor TrL of a differentialamplifier.

The series connection of a load resistor R0 and the transistor Tr6 isarranged between the supply voltage Vcc and ground. Herein, the resistorR0 may well be formed by combining a transistor and a resistor as shownin FIG. 35 by way of example. Also disposed between the supply voltageVcc and the ground is the series connection of the transistor Tr5, andthe differential amplifier which is the load of the transistor Tr5 andwhose constituents are the transistors TrL and TrR.

On the other hand, the emitter of the sensing diode Q1 formed by thediode connection of a transistor is connected to the base of thetransistor TrL. Herein, the “diode connection of a transistor” shallsignify that connection form of the transistor in which a collectorterminal and a base terminal are directly connected to each other.Further, the collector of the sensing diode Q1 is connected to thesupply voltage Vcc through a resistor rL. Likewise, the emitter of anon-sensing diode Q2 is connected to the base of the transistor TrR, andthe collector of the non-sensing diode Q2 is connected to the supplyvoltage Vcc through a resistor rR. Further, smoothing capacitors Ca andresonators Reso are connected to the base terminals (near points A) ofthe differential pair transistors (TrL, TrR). Those ends of them (Ca,Reso), which are not connected to the base terminals of the differentialpair transistors (TrL, TrR), are respectively grounded.

The resonators Reso, however, are not always necessary for detecting theradio frequency power. Especially, the resonator Reso on the non-sensingdiode side (Q2 side) does not cause any special drawbacks even whenomitted.

The main features of the detection/amplification circuit 110 are asfollows:

-   (1) The reference current Iref (=collector current of the transistor    Tr6) and subsidiary current Ic (=collector current of the transistor    Tr5) of the current mirror circuit are guaranteed to substantially    agree, owing to the function of this current mirror circuit. More    specifically, since the bias voltages of the transistors Tr5 and Tr6    are equal, the quantities of currents which flow through both of the    transistors come into substantial agreement irrespective of the    loads of these transistors. When the current Ic is brought into the    order of μA by utilizing the resistor R0, the base current Idia of    the transistor TrL and that Idib of the transistor TrR become Ic/β    with respect to the current gain β of the transistor TrL, in    accordance with the configuration of the above peripheral circuit    (differential circuit). Therefore, the base currents become the    order of several tens nA surely, and hence, low bias currents can be    automatically applied to the differential pair transistors (TrL,    TrR). Further, a resistor which corresponds to a high resistance R2    in the order of several MΩ in FIG. 38 can be formed of an input    impedance from the base terminal of the transistor TrL, and it    becomes a high resistance surely.-   (2) The resonator (Reso) is connected to the point A on the cathode    side of the sensing diode Q1, whereby the points A in FIG. 2 are set    so as to be short-circuited to the ground for the frequency of the    predetermined radio frequency power (RF) to be detected. Further,    the matching circuit MC is disposed on the first terminal side    (anode side) of the sensing diode Q1, whereby the radio frequency    power is fed to the input end of the sensing diode Q1 to the    maximum. The elements Ca are the smoothing capacitors for the DC    conversions.-   (3) The peripheral circuit (differential circuit) is configured so    that the current of the differential amplification circuit which is    configured including the differential pair transistor TrL (sensing    side) and the differential pair transistor TrR (non-sensing side)    may be regulated by the current mirror circuit which is configured    including the reference transistor Tr6, and that the current Idia    which assumes substantially a half of the current which flows    through the subsidiary transistor Tr5 may substantially agree with    the DC component of the current which flows through the sensing    diode Q1.

The sensing diode Q1 constructed of the N-P-N type transistor, and thenon-sensing diode Q2 constructed similarly thereto are arranged in asubstantially symmetric shape in order to prevent the undesiredinfluence of a drift on the supply potential Vcc.

In other words, the detection/amplification circuit 110 is configured sothat a radio frequency signal can be sensed on the basis of thedifference between the DC potential on the cathode side of thenon-sensing diode Q2 and the DC potential on the cathode side of thesensing diode Q1 as forming the reference bias in order to prevent theinfluence of the fluctuation of the supply voltage Vcc. Morespecifically, the deviation δv between a referential DC (referential DCpotential) and a detection side DC (=referential DC+δv) at the right endof FIG. 2 is outputted on the basis of the difference between the DCpotential on the cathode side of the non-sensing diode Q2 and the DCpotential on the cathode side of the sensing diode Q1 as forms thereference bias. That is, when the deviation δv is zero, the differentialoutput of the differential amplifier becomes substantially zero ideally.

In the start signal output circuit 100 (FIG. 1), accordingly, abalancing function which balances potentials; the potential of theoutput point P1 of the diode detection portion termed in FIG. 38described above, the potential of the input point P2 of an amplifierside, and a bias voltage Vbb for use in the amplifier can beautomatically secured. Consequently, while the undesired influenceattendant upon the fluctuation of the voltage Vcc of the DC power supplyis excluded, the RF signal can be sensed by the sensing diode Q1, andthe potential detected by the sensing diode Q1 can be converted into thedirect current by the resistance components included in the differentialpair transistor TrL (detection potential side) and the subsidiarytransistor Tr5, and the smoothing function of the capacitor Ca.

When the radio frequency signal is received in the above DC bias state,it flows to the ground through the matching circuit MC, the sensingdiode Q1 and the resonator Reso (or smoothing capacitor Ca). Since, onthis occasion, the sensing diode Q1 is biased by the bias current in thenA order, substantially the half wave component of the positive regionof the radio frequency signal can pass through the sensing diode Q1, andthe half wave current of each cycle is accumulated and smoothed by thesmoothing capacitor Ca. Thus, the DC signal can be obtained from theradio frequency signal.

Owing to the fact that the bias current of the sensing diode Q1 is verysmall in this manner, power is economized, the efficiency of half waverectification is enhanced, and detection sensitivity can be remarkablyenhanced.

The operation of the detection/amplification circuit 110 in the firstembodiment will be quantitatively described in more detail by usingmathematical expressions, with reference to FIG. 2. The operatingprinciple of the detection/amplification circuit of the first embodimentutilizing the current mirror circuit as elucidated below, basicallyholds true also of the second embodiment to be described later.

The base current of the non-sensing side transistor TrR of thedifferential pair transistors in the detection/amplification circuit 110in FIG. 2 is substantially in agreement with the DC component of thecurrent flowing through the non-sensing diode Q2. That is, thenon-sensing side of the detection/amplification circuit 110 isconfigured symmetrically to the sensing side thereof.

Owing to the circuit arrangement which utilizes such a current mirrorcircuit, the reference current Iref and the subsidiary current Ic inFIG. 2 become equal quantities (Iref=Ic). Further, to be in more detail,two elements FE1 and FE2 which are, for example, MOSFETs form a currentmirror arrangement, so that currents Ia and Ib which are outputted fromthe respective elements become equal quantities (Ia=Ib=Iref/2).

Meanwhile, when the radio frequency power is inputted through thematching circuit, it is rectified by the sensing diode Q1, whereby thepotential of the point A rises. As a result, the direct current Ia toflow through the transistor TrL increases to the amount of Δa. Further,the potential of the point B becomes a constant value which is lowerthan the supply voltage Vcc in correspondence with the voltage of avoltage drop across the diode-connected transistor FE1, so that all thecurrent Ia flows through the transistor TrL. Also, regarding the twoMOSFETs (FE1, FE2) which construct the active loads of the differentialamplifier, the current mirror circuit is constructed, so that thecurrent Ib on the side opposite to the current Ia (on the FE2 side)similarly increases to the amount of Δa. Further, sign Id in FIG. 2represents the collector current of the differential pair transistorTrR. As explained below, the current Id does not agree with the abovecurrent Ib when the radio frequency power is inputted.

(Equation of Currents)Ia=IbIref=Ic=Ia+Id=constant  (1)

On this occasion, the collector current Ic of the subsidiary transistorTr5 is always equal in quantity to the current Iref owing to thefunction of the current mirror circuit, and it does not increase.

Accordingly, when the radio frequency input exists, each of the currentsIa and Ib increases to the amount of Δa as described above, and thecurrent Id decreases to the amount of Δa as understood from Eq. (1). Inthe existence of the radio frequency input, therefore, the current Ioutbin the figure increases to the amount of 2Δa. In other words, in theexistence of the radio frequency input, the potential of a point C risesso that the current Ioutb may increase to the amount of 2Δa. This is thebasic principle of the detection/amplification circuit 110.

Further, as in the first embodiment (FIG. 2) described above, thedesired radio frequency can be efficiently sensed at a high precision,on the basis of the difference between the DC potential (cathode endpotential) of the non-sensing diode Q2 and the DC potential (cathode endpotential) of the sensing diode Q1. Further, according to such aconfiguration, even when the supply potential (Vcc) dropps, both biaspotentials of the differential pair transistors (example: TrL and TrR inFIG. 2) of the differential amplifier lower in balanced fashion, andhence, it is prevented that the sign of the difference ((detection sideDC)−(referential DC)) of the output potential is improperly reversed dueto the drop of the supply potential. Owing to this function, therefore,a detection error ascribable to the drift of the supply voltage can beeffectively prevented.

2. Succeeding Stage (Determination Circuit 120)

A determination criterion in the differential amplifier (determinationcircuit 120) at the succeeding stage can be freely set by appropriatelyadjusting resistances Ra and Rb, whereby the output sensitivity and aninversion width can be adjusted or optimized.

FIG. 3 is a circuit diagram of the determination circuit 120 of thestart signal output circuit 100 in this embodiment. The load resistanceRa (input fluctuation side) of a transistor Tr7 whose base terminal isconnected to the point C in FIG. 2 is set to be somewhat smaller thanthe load resistance Rb (determination-criterion input side) of atransistor Tr8 whose base potential hardly changes irrespective of theexistence or nonexistence of the radio frequency input. Thus, thepotential of the point a in FIG. 3 in the nonexistence of the radiofrequency input is set to be somewhat higher than that of the point b inFIG. 3 in the nonexistence of the radio frequency input. That is, anoffset is applied.

More specifically, in FIG. 3, resistances are set as indicated by thefollowing equations (2) and (3):

(Individual Resistances)rc=45 kΩra=4 kΩrb=5 kΩ  (2)(Combined Resistances)∴Ra=45 kΩ+4 kΩ=49 kΩRb=45 kΩ+5 kΩ=50 kΩ  (3)

According to such settings by way of example, when an RF input level issmall or when the RF input is nonexistent, the potential of the point ain FIG. 3 is higher than that of the point b, and hence, a transistorTr18 in the determined-result binarization circuit 130 (FIG. 1) at thesucceeding stage becomes an ON state. On the basis of these functions,accordingly, the potential of a point E in FIG. 1 can be lowered near toalmost zero V when the RF input level is small or when the RF input isnonexistent.

To the contrary, when the RF input level is large, the potential of thepoint a in FIG. 3 lowers, and that of the point b rises, and hence, thepotential of the point b becomes higher than that of the point a. As aresult, transistors Tr15 and Tr17 become ON states, whereas transistorsTr18 and Tr19 become OFF states at the same time. After all, when the RFinput level is large, the DC potential of the point E in FIG. 1 risesclose to the supply voltage Vcc.

According to such a configuration, an appropriate comparison-criterionpotential (reference potential) can be generated within an IC in whichthe start signal output circuit is mounted. Accordingly, an externalcircuit for generating the comparison criterion potential outside, or awiring line for introducing the reference potential is not required.That is, according to such a configuration, the criterion offset can beformed within the IC, and hence, an IC implementation (the integrationof a semiconductor circuit) can be easily promoted.

3. Final Stage (Determined-Result Binarization Circuit 130, LC FilterSection 140)

The functions of amplifying an output and converting the amplifiedoutput into a DC potential are fulfilled by the final stage. The finalstage has its signal oscillated to a saturation level, whereby the finaloutput becomes a level near the supply voltage Vcc when the signalarrives, and it becomes a voltage near zero V when the signal does notarrive or is lower in level than a reference.

FIG. 41 is a circuit diagram of a known binarization circuit whichresembles the determined-result binarization circuit 130 of the startsignal output circuit 100. This circuit diagram is an extraction from“Analysis and Design of Analog Integrated Circuit, Second Edition, PaulR. Gray, Robert G. Meyer, John Wiley & Sons”. Such a binarizationcircuit, for example, is useful in the actual approach of the invention.

(Evaluation of Whole Start Signal Output Circuit)

FIG. 4 is a graph exemplifying the output voltage of the start signaloutput circuit 100 versus the intensity of the input power (radiofrequency power). It is understood from the graph that the output of atleast −60 dBm rises to the saturation level, so the arrival of thedesired radio frequency power (at about 5.8 GHz) can be sensed. Further,the output of less than −65 dBm is not detected.

The above saturation level of the output potential of the start signaloutput circuit 100 is about 2.4 V for the supply voltage Vcc of about2.7 V, and is about 1.5 V for the supply voltage Vcc of about 1.7 V.

On the other hand, exemplified in FIG. 5 is the output voltage of astart signal output circuit 100′ for comparison, versus the input powerthereof, in the case where Ra=Rb=50 kΩ is set. This corresponds to acase where rc=45 kΩ and ra=rb=5 kΩ are set in Eq. (2) described above.In this case, however, the output voltage is as high as about 1 V evenwhen it is determined that the radio frequency power does not arrive. Asunderstood from such a comparative example by way of example, the largechange width of the output of the binarization circuit can be secured byappropriately setting the difference ΔR (≡Rb−Ra>0).

FIGS. 6 and 7 are graphs exemplifying the several characteristics of thestart signal output circuit 100 versus the supply voltage Vcc. FIG. 6represents the output potential (output voltage (V)) of the start signaloutput circuit 100 versus the supply voltage Vcc. It is understood fromthe graph that, if Vcc≧1.6 V holds, a satisfactory potential differencecan be secured between the output potentials after the binarizations ofthe detected results (detection/non-detection).

Further, FIG. 7 represents the value of the supply current of the startsignal output circuit 100 versus the supply voltage Vcc. In a case, forexample, where the start signal output circuit 100 operates at Vcc=1.6V, the supply current becomes 20 μA, and the power consumption of thewhole circuit becomes 32 μW. Thus, it is understood that, according tosuch a circuit arrangement, the start signal output circuit ofremarkably low power consumption, including even the determinationcircuit, can be configured.

Further, FIG. 8 is a graph exemplifying the transfer function (transferratio) of the detection potential (δv) of the sensing diode in the startsignal output circuit 100, versus the frequency. In this manner by wayof example, it is understood that, according to the arrangement of thestart signal output circuit 100 described above, the DC component of thedetection potential of the sensing diode is amplified overwhelminglymore efficiently than the other frequency values.

According to such a configuration, with respect to the frequency, onlythe vicinity of the direct current is especially subjected to low passfiltering and amplification, so that the other noise components can beeffectively removed. Therefore, the sensitivity can be sharply enhancedmore than in the prior art diode detection. In other words, in a casewhere the configurations are realized by an analog circuit of lowerpower consumption, the transfer function usually becomes a monotonousdecrease function versus the frequency.

[Evaluation and Problems of First Embodiment]

In the first embodiment described above, it cannot be said thatconsideration for immunity against noise (internal disturbances)developing within the device, for example, channel noise in the MOSFETs,is satisfactory.

Therefore, when the start signal output circuit 100 is used, an S/Nratio deteriorates under, for example, a high-temperature operatingenvironment, and a situation where an erroneous determination occurs,etc. can be sometimes considered. That is, in the first embodiment, acase can be considered where the output of the detection/amplificationcircuit and the output level of the determination circuit are not alwayssatisfactory, so a detection sensitivity cannot be set satisfactory.

As the principal reasons for considering that a satisfactory S/N ratiocannot be always ensured in the first embodiment, it is pointed out thata sensing amplitude is small in the detection/amplification circuit 110,and that the flicker noise of the MOSFETs is large. Further, it cannotbe said that the determination circuit 120 is always in a desirableaspect, because it cannot attain sufficient amplification on account ofthe resistance loads.

In order to verify the relation of the cause and effect concerning theS/N ratio, a simulation was conducted on the wave detection operation ofthe start signal output circuit 100′ (FIG. 9) which is configured on thebasis of the above invention (first embodiment).

FIG. 10A is a graph showing the input DC potential of the determinationcircuit 120, while FIG. 10B is a graph showing the spectrum (computedvalues) of the input noise of the determination circuit 120. Further,FIG. 11A is a graph showing the output DC potential of the determinationcircuit 120, while FIG. 11B is a graph showing the spectrum of theoutput noise of the determination circuit 120. Further, FIG. 12A is agraph obtained by modeling the input waveform of the determinationcircuit 120 with the conditions of FIGS. 10A and 10B premised. Further,FIG. 12B is a graph obtained by modeling the S/N ratio on the outputside of the determination circuit 120 in the case where the radiofrequency power does not arrive, under the conditions of FIGS. 11A and11B.

More specifically, FIG. 12A shows a simulation waveform in the casewhere the noise corresponding to FIG. 10B is superimposed on the outputof the detection/amplification circuit. Further, FIG. 12B shows awaveform simulative of a case where the noise in the determinationcircuit output is superimposed on the rectangular wave of a voltagewidth which corresponds to the determination level difference of theoutput terminals of the determination circuit in the nonexistence of theinput of the radio frequency power.

In the simulation, an input was a waveform obtained by subjecting aninput signal of 5.8 GHz and −60 dBm to an ASK modulation at a width of781 μsec and a period of 2.343 msec. Since the intermediate stage(determination circuit 120) of the start signal output circuit 100′ inFIG. 9 has the configuration employing resistance loads, noise levels asshown in FIG. 11B appear at both points V2outa and V2outb in the figure,respectively. It was accordingly revealed that, as seen from FIG. 12B,an S/N ratio is considerably low in a comparison result (output signalof the determination circuit) at the intermediate stage (determinationcircuit 120) of the start signal output circuit 100′ in FIG. 9, so anerroneous determination might occur depending upon the level of thedeveloping noise voltage (FIG. 10B).

(Second Embodiment)

The second embodiment exemplified in conjunction with the drawings ofFIGS. 13 through 24 is in order to solve these problems. As means forsolving the problems, by way of example, the foregoing embodiment ismodified so that a voltage doubler wave-detector circuit can be utilizedfor the detection/amplification circuit, an S/N ratio is enhanced byemploying MOSFETs of large gates, or it is permitted to obtain a largeamplitude by introducing active loads configured of transistors, intothe determination circuit. Further, a combination with a binarizationcircuit utilizing CMOS is considered so that the power consumption canbe further lowered.

[Voltage Doubler Wave-Detector Circuit]

FIG. 13 is a circuit diagram exemplifying a start signal output circuit200 in the second embodiment. Further, FIG. 14 is a circuit diagram of adetection/amplification circuit 210 which is included in the startsignal output circuit 200. In the second embodiment, first of all, asshown in FIG. 13, in the start signal output circuit having an RF/DCconversion circuit to which radio frequency power (RF) of specifiedfrequency is inputted and from which a direct current potential (DC) isoutputted, there is disposed a detection/amplification circuit whichincludes a voltage doubler wave-detector circuit that includes a sensingdiode for sensing the radio frequency power, a differential amplifierthat includes transistors Tr31 and Tr32 corresponding to thedifferential pair transistors TrL and TrR described above, and a currentmirror circuit, wherein the base current of one Tr31 (TrL) of thedifferential pair transistors is brought into substantial agreement withthe DC component of a current flowing through the sensing diode, and thetotal of currents flowing through the differential pair transistors Tr31and Tr32 (TrR) is regulated to a substantially constant value by thecurrent mirror circuit.

Further, the “voltage doubler wave-detector circuit” signifies awave-detector circuit which is configured by employing a voltage doublerrectification circuit, and the configuration is shown in the eleventhinvention described above. Such a voltage doubler wave-detector circuitis known as an example utilized for a power supply circuit, and adetailed disclosure on its functions is contained in “Design andManufacture of Radio frequency circuit” (written by Kenji Suzuki, andpublished by CQ Publishing Co., Ltd.) described above. FIG. 15 shows acircuit diagram of a conventional, voltage doubler wave-detector circuit10. In the second embodiment, a circuit equivalent to such awave-detector circuit is combined with a differential amplifier and isincluded in the detection/amplification circuit 210 (FIG. 14).

More specifically, by way of example, the two resistors which areincluded in the detection/amplification circuit 110 (FIG. 2) in thefirst embodiment described above are respectively replaced with twodiodes (Tr35, Tr37) as exemplified in FIGS. 13 and 14. The configurationequivalent to the voltage doubler wave-detector circuit 10 can beincorporated into the detection/amplification circuit merely byperforming such a replacement. The replacement (remodeling) may beconsidered as corresponding to an improved invention for thedetection/amplification circuit 110 (FIG. 2) in the first embodiment(that is, the eleventh invention of the present application). That is,it is to be noted that the voltage doubler wave-detector circuit isincorporated in the detection/amplification circuit 210 in FIG. 14 soadvantageously.

The reference transistor of the current mirror circuit in FIGS. 13 and14 is a transistor Tr30, the load resistor R0 of which is configured ofa resistor R₀₀, a resistor R₀₁ and a transistor Tr₀₀ as shown in FIG.14.

The loads of the transistors Tr31 and Tr32 in FIG. 14 comprise activeloads in which MOSFETs (M1, M2) are arranged in a symmetric form. Twodiode-connected transistors Tr35 and Tr34 are inserted in series betweenthe base terminal of the transistor Tr31 (TrL) and a feed point (Vcc),and in succession from the feed point side. The output terminal of thematching circuit is connected between the two transistors Tr35 and Tr34.Further, the transistor Tr34 corresponds to the sensing diode, and atransistor Tr36 corresponds to a non-sensing diode. A smoothingcapacitor Cb is connected to the base terminal of the transistor Tr31(TrL). The detection/amplification circuit 210 is configuredsubstantially in left-right symmetry except the presence or absence of aconnection node with the matching circuit.

FIG. 15 is a circuit diagram of the voltage doubler wave-detectorcircuit 10 which is generally known. During the negative half cycle of asupply voltage at an input terminal, a diode D1 is rendered conductive,and a capacitor C1 is charged in a polarity indicated in the figure, upto the maximum value Vm of the input voltage. In the succeeding positivehalf cycle, the diode D1 is not rendered conductive, and a diode D2(sensing diode) is rendered conductive. On this occasion, the terminalvoltage of a capacitor C2 is charged up to about 2 Vm owing to theaddition of the voltage Vm charged in the capacitor C1, as described in,for example, “Textbook: Electronic circuit” (written by Noriyuki Itoh,and published by Nippon Riko Shuppan Kai) or “Design and Manufacture ofRadio frequency circuit” (written by Kenji Suzuki, and published by CQPublishing Co., Ltd.).

Accordingly, if such a voltage doubler wave-detector circuit is usable,a larger detection signal than in the case of the first embodimentdescribed above can be obtained. In actuality, equivalent correspondingrelations described below are held in the detection/amplificationcircuit 210 in the second embodiment, and hence, a reception sensitivitywhich is double as high as in the detection/amplification circuit 110(FIG. 2) is attained in the detection/amplification circuit 210.

<Voltage doubler wave-detector circuit 10> <Detection/amplificationcircuit 210> C1 C₀₀ (Capacitance within matching circuit) D1 Tr35(Resistor in the first embodiment) D2 Tr34 (Sensing diode Q1) C2 Cb RLTr31 (Differential pair transistor TrL)

The circuits in FIGS. 14 and 15 will be more specifically described bycomparison. The diode D1 is realized by the diode-connected transistorTr35. Further, the ground of the diode D1 corresponds to the supplyvoltage (Vcc), the diode D2 to the diode-connected transistor Tr34, aresistor RL to the input impedance of the transistor Tr31, the capacitorC1 to a capacitor C₀₀ which is in series with a signal transfer linewithin the matching circuit, and the capacitor C2 to the smoothingcapacitor Cb. In this manner, this embodiment has the configuration inwhich the voltage doubler wave-detector circuit is very advantageouslyincorporated into the differential amplification circuit utilizing thecurrent mirror circuit.

That is, the portion which is the resistor in thedetection/amplification circuit 110 of the start signal output circuit100 in the first embodiment is constructed of the diode (Tr35) in thedetection/amplification circuit 210 in the second embodiment, wherebythe voltage doubler wave-detector circuit is, in fact, disposed. Thus,in the same manner that the first embodiment incorporates the diodewave-detector circuit into the differential amplifier, the secondembodiment incorporates the voltage doubler wave-detector circuit(voltage doubler rectification circuit) into the differential amplifier.Thus, the larger output (sensitivity) than in thedetection/amplification circuit 110 in the first embodiment is naturallyattained.

[Other Advantages Based on Voltage Doubler Wave-Detector Circuit]

Moreover, as described above, the amplitude of thedetection/amplification circuit (210) in the second embodiment is largerthan the amplitude (gain) in the foregoing case of the first embodiment.Therefore, when an appropriate amplification circuit (determinationcircuit 220) is disposed at the intermediate stage of the start signaloutput circuit (200) as shown in FIG. 13, its output becomes a potentialwhich is sufficient for inverting the output level of a CMOS circuit. Itis accordingly permitted to dispose at the succeeding stage of theamplification circuit, a binarization circuit 230 which is constructedof the CMOS circuit as shown in FIG. 13. In the case where the CMOScircuit is disposed behind such an amplifier (determination circuit220), the input impedance of the CMOS circuit is very high, and hence,the amplitude becomes still larger. That is, it is permitted to replacea wide-range amplifier (limiter amplifier) such as the binarizationcircuit exemplified in FIG. 41 or FIG. 1, with the CMOS circuit(binarization circuit 230) as exemplified in FIG. 13. According to sucha configuration, the amplifier at the final stage (binarization circuit130) can be removed, so that power consumption can be further suppressedby the configuration.

Furthermore, it is revealed that, according to the above circuit form,the transistors Tr35 and Tr37 in FIG. 14 can be set at more appropriatebias values than in the case where these transistors are substituted bythe resistors (that is, in the case of the detection/amplificationcircuit 110), so the function of increasing the gain of the differentialamplifier itself is attained.

Shown in FIG. 16A is a diagram of a circuit which is equivalent to thewave-detector circuit included in the detection/amplification circuit110 of the start signal output circuit 100 in the first embodiment.Also, shown in FIG. 16B is a circuit diagram of a wave-detector circuitwhich is included in the detection/amplification circuit 210 of thestart signal output circuit 200 in the second embodiment. The circuit ofFIG. 16A in the first embodiment corresponds to a circuit in the casewhere the transistor Tr35 of the circuit in the second embodiment shownin FIG. 16B is replaced with a resistor (that is, to part of thedetection/amplification circuit 110′ in FIG. 9).

In the circuit diagram of FIG. 16A, the base current of the transistorTrL which always flows via transistors Q1 and TrL in succession, fromthe supply voltage (Vcc≅3.0 V) fed by, for example, a battery, is in theorder of nA, and hence, a voltage drop across the resistor is quitenegligible. Here, both the potential differences between the bases andemitters of the transistors Q1 and TrL are about 0.6 V, so that thepotential Vd of a point D becomes about “Vcc−2×0.6 (V)”. Hereinbelow,Vcc≅3.0 V is assumed unless otherwise specified.

Further, the threshold voltage of a MOSFET (FE1) in the case of diodeconnection is designated by Vth. On this occasion, the potential of apoint B becomes Vb=Vcc−Vth or so, and the potential difference betweenthe points B and D becomes 1.2−Vth. The threshold voltage Vth can bevariously set depending upon processes, and it is usually 1.0 V or so.Further, since the transistors FE1 and TrL are operated with lowcurrents of μA order in the start signal output circuit 100, thetransistor FE1 operates in the vicinity of the threshold voltage Vth.

Under these operating conditions, the collector-emitter potentialdifference of the transistor TrL becomes about 0.2 V, which isinsufficient for the active operation of the transistor TrL, so that thegain of the transistor TrL becomes low.

On the other hand, in FIG. 16B, the potential Vd of the point D becomesabout “Vcc−3×0.6 (V)”, and hence, the potential difference between thepoints B and D becomes 1.8−Vth. Further, Vth≅1.0 V holds as describedabove, with the result that a potential difference of about 0.8 V can beapplied and permits the transistor Tr31 to perform the active operationthereof. Accordingly, the gain of the transistor Tr31 is high.

In other words, it can be said that, owing to the voltage drop functionbased on the disposition of the transistor Tr35, the gain of thetransistor Tr31 of the detection/amplification circuit 210 in FIG. 14(the differential pair transistor TrL on the sensing side) is permittedto be set higher than in the first embodiment. The S/N ratio can beeffectively enhanced also by such a function.

[Determination Circuit 1]

FIG. 17 is a circuit diagram of the preceding stage(detection/amplification circuit 210) and the intermediate stage(determination circuit 220) of the start signal output circuit 200according to the second embodiment. That is, FIG. 17 shows a circuitarrangement in which the determination circuit 220 is disposed behindthe detection/amplification circuit 210. Further, FIG. 18 shows acircuit diagram of an equivalent circuit to active loads (Tr23, Tr24)which are included in the determination circuit 220.

The determination circuit 220 in FIG. 17 includes a differentialamplifier being substantially symmetric logically, which is configuredby opposing two transistors (Tr21, Tr22). It compares an input level(V1outb) with a reference potential (V1outa) by using the differentialamplifier. A load portion (Tr23, Tr24) which regulates a current flowingthrough the differential amplifier is constituted by the active loads inFIG. 18 as are actually asymmetric in spite of a current mirror circuitarrangement. More specifically, the active loads (Tr23, Tr24) areconfigured of two bipolar transistors (Tr23, Tr24). Further, as seenfrom FIGS. 13 and 17, a current which flows through the determinationcircuit 220 is regulated and limited to a small value by the subordinatetransistor Tr10 described above.

The active loads which are configured of the bipolar transistors asdescribed above, actually become an asymmetric circuit as shown in FIG.18, even when a substantially symmetric shape as in the determinationcircuit 220 in FIG. 17 is formed. The reason therefor is that aresistance rc indicated in the equivalent circuit in FIG. 18 is actuallyinterposed, and the potential of a point b consequently becomes lowerthan that of a point a in correspondence with a voltage drop formed byelements βib and rc. Herein, the potential of the point a lowers incorrespondence with the base-emitter potential difference (about 0.6 V)of the transistor Tr23, and it is therefore fixed to about “Vcc−0.6 V”.

Shown in FIG. 19 are the potential changes of the points a and b. Asshown in FIG. 19, the reference potential fixed to about “Vcc−0.6 V” isformed at the point a, and the potential of the point b is lower thanthat of the point a during the nonexistence of a signal. However, whenthe signal is inputted, the potential of the point b rises, and itexceeds the potential of the point a for the large level of the inputsignal. In other words, the signal level can be compared with referenceto the potential of the point a.

That is, when the asymmetry of the active loads is advantageouslyutilized as shown in FIGS. 17 and 18, the relation between themagnitudes of the potentials of the points a and b can be effectivelyreversed in accordance with the existence or nonexistence of the inputsignal or the magnitude thereof, as exemplified in FIG. 19.

In order to realize such a good inverting operation, the balance of theasymmetric loads (the relation between the magnitudes of the asymmetricloads) need be appropriately adjusted.

[Determination Circuit 2]

In a case, for example, where the potential of the point a in the stateof no input is to be lowered slightly, a resistor R may be inserted onthe side of a transistor Tr23 as in FIG. 20. That is, FIG. 20 is acircuit diagram exemplifying that modified embodiment of thedetermination circuit 220 (a determination circuit 220′) in which suchan adjustment is made by the resistor R₂₀.

Further, the potential of the point b in the state of no input may besimilarly adjusted by inserting a resistor on the side of a transistorTr24, and both the potentials can be finely adjusted. In such a circuit(example: amplification circuit 220″ in FIG. 21), the difference betweena reference potential and a determination-circuit output level can beenlarged, and hence, the enhancement of an S/N ratio can be easilyattained by optimizing individual resistance values.

Further, at the point a in FIGS. 17 and 18, the transistor Tr23 isdiode-connected, so that the potential is not amplified even in theexistence of the input. Accordingly, noise is much less than at thepoint b. In contrast, in the case of adopting the configuration of thefirst embodiment (the determination circuit 120 in FIG. 3) in which thetransistors Tr23 and Tr24 are replaced with the resistors, noises atequal degrees are superimposed on both the points a and b. Also in thisrespect, it can be said that the second embodiment is more excellent.

[Determination Circuit 3]

Further, FIG. 21 is a circuit diagram of a start signal output circuit203 which is obtained by modifying part of the determination circuit ofthe start signal output circuit 200 in FIG. 13. In the start signaloutput circuit 203, a binarization circuit 230 employing CMOS functionsas a comparison/determination circuit, while the amplification circuit220″ at a intermediate stage operates merely as an amplifier of oneoutput without delivering a reference potential to a succeeding stage.

(Signs)

V1outa: DC input potential of determination circuit (reference side)

V1outb: DC input potential of determination circuit (sensing side)

V2outa: DC output potential of determination circuit (sensing side)

[Evaluation of Start Signal Output Circuit 203]

There will now be described characteristics which concern the S/N ratioof the start signal output circuit 203 of the second embodiment havingthe amplification circuit 220″.

In order to verify the effectiveness (sensitivity) of the start signaloutput circuit 203 in FIG. 21 employing the determination circuit 3described above (: determination circuit 220″ in FIG. 21), thesimulation of a circuit operation was performed. In the simulation,input power was given in a waveform obtained by subjecting a carrier of5.8 GHz and −60 dBm to an ASK modulation at a width of 781 μsec and aperiod of 2.343 msec. Further, a supply voltage Vcc was assumed to be 3V, and an operating current was assumed to be 13.2 μA. These valuessignify remarkably low power consumption which is more excellent than inthe third and fourth embodiments to be described later, and they areactualized by the circuit arrangement of the start signal output circuit203 in FIG. 21.

FIG. 22A is a graph showing the input DC potential of the amplificationcircuit 220″, while FIG. 22B is a graph showing the spectrum (computedvalues) of the input noise of the amplification circuit 220.″ In thestart signal output circuit 203 in the second embodiment, thedetection/amplification circuit 210 is employed at a preceding stage. Itis understood from FIGS. 22A and 22B that, in thedetection/amplification circuit 210 in this embodiment, a leveldifference exhibited between in a case where radio frequency power isreceived and in a case where not is larger than in the first embodiment(FIGS. 9 and 10), and that noise is lower. The reason why the leveldifference (amplitude) has become larger is the introduction of avoltage doubler wave-detector circuit. The reason why the noise becomeslower, is the alteration of the gate sizes of MOSFETs. The MOSFETs M1and M2 in the detection/amplification circuit 210 have gate widths of 5μm and gate lengths of 10 μm. On the other hand, in the MOSFETs in thecircuit of the first embodiment (FIG. 9), gate widths are 1.3 μm, andgate lengths are 0.4 μm. That is, with the configuration of the startsignal output circuit 203 of the second embodiment, functions andadvantages owing to the seventh invention of the present application canbe appropriately achieved in proper quantities on the basis of, forexample, “RF CMOS circuit design technology” (written by Nobuyuki Itoh,and published by Kabushiki-Kaisha Triceps) described above.

FIG. 23A is a graph showing the output DC potential of the amplificationcircuit 220″. Further, shown in FIG. 23B is the spectrum of the outputnoise of the amplification circuit 220″. The amplification circuit 220″includes active loads, and the binarization circuit 230 employing CMOSis further arranged at a succeeding stage. Therefore, the load impedanceof the amplification circuit 220″ is high, and the start signal outputcircuit 203 of the second embodiment has a very large gain as seen fromthe graph of FIG. 23A.

FIG. 24A is a graph obtained by modeling the input waveform of theamplification circuit 220″ with the conditions of FIGS. 22A and 22Bpremised. Here, a case is modeled where noise of 40 nV is superimposedon a fundamental waveform having an amplitude of 7.16 mV. The amplitudebecomes larger than in a prior art example, and the absolute value ofthe noise becomes less.

FIG. 24B is a graph obtained by modeling the output characteristic (S/Nratio) of the amplification circuit 220″ in the case where radiofrequency power is not received, with the conditions of FIGS. 23A and23B premised. This graph represents a state where noise of 19 μV issuperimposed on a fundamental wave having an amplitude of 0.49 V. Withthe start signal output circuit 203 of the second embodiment, as seenfrom FIG. 24B, the level of the noise after the amplification is largerthan in the first embodiment (FIG. 12B), but the S/N ratio is much moreexcellent.

Further, since the binarization circuit (limiter amplification circuit)at the final stage is the binarization circuit 230 employing CMOS oflowered power consumption, the start signal output circuit 203 of thesecond embodiment can realize still lower power consumptioncorrespondingly, and it actually operates with power consumption of 3 Vand 13.2 μA as is less than half of that of the other embodiment. Alsoin this respect, the start signal output circuit 203 of the secondembodiment is very excellent.

(Third Embodiment)

As a method for attaining a large amplitude (gain) in the determinationcircuit (example: determination circuit 120 in FIG. 1), there isdescribed, for example, the method in which the appropriate loadresistors (r_(a), r_(b) and r_(c)) are employed as exemplified in detailin FIG. 3 in the foregoing first embodiment. Alternatively, however,there is a method in which the gain of the differential pair transistorsof the differential amplifier of the determination circuit is enhanced.The method is, for example, one in which Darlington connection isemployed for the part of the differential pair transistors of thedifferential amplifier of the determination circuit.

FIG. 25 exemplifies a determination circuit 222 in which thedetermination circuit 120 (FIG. 3) in the foregoing first embodiment isreconfigured using the Darlington connection. Incidentally, also here,load resistors are set at Ra<Rb in the same manner as in the firstembodiment. As already explained, this is because the potential of thepoint a need be higher than that of the point b in case of no input.

FIG. 26 is a circuit diagram of a start signal output circuit 202 in thethird embodiment as is configured using the determination circuit 222.In the start signal output circuit 202, the detection/amplificationcircuit 210 of the voltage doubler form in FIG. 14 is employed as thedetection/amplification circuit, and the binarization circuit 130 at thesucceeding stage is the same as in the first embodiment (FIG. 1).

Also for the start signal output circuit 202, a similar simulation wasperformed under the same conditions as in the foregoing embodiment.However, the supply voltage Vcc was assumed to be 3 V, and the operatingcurrent was assumed to be 28.8 μA. These values signify remarkably lowpower consumption, and they are actualized by the circuit arrangement ofthe start signal output circuit 202 in FIG. 26.

FIG. 27A shows the input DC potential of the determination circuit 222.Further, shown in FIG. 27B is the spectrum (computed values) of theinput noise of the determination circuit 222. It is seen from thesegraphs that, with the detection/amplification circuit 210, both thedetection waveform and the noise are sharply improved as in the secondembodiment. Since the input impedance of the Darlington connectionaffords the high input impedance of transistors, the amplitude of thedetection signal becomes larger than in FIG. 22A referred to in theforegoing second embodiment.

FIG. 28A is a graph showing the output DC potential of the determinationcircuit 222, while FIG. 28B is a graph showing the spectrum of theoutput noise of the determination circuit 222. It is seen from thesegraphs that, although the values of the noise are at the same degree asin the prior art, the amplitude is improved.

FIG. 29A is a graph obtained by modeling the input waveform of thedetermination circuit 222 with the conditions of FIGS. 27A and 27Bpremised. This illustrates a state where noise of 40 nV is superimposedon a fundamental waveform having an amplitude of 76 mV, and itrepresents the waveform of a potential V1outb.

Further, FIG. 29B is a graph obtained by modeling the outputcharacteristic (S/N ratio) of the determination circuit 222 in the casewhere radio frequency power is not received, with the conditions ofFIGS. 28A and 28B premised. It represents a state where noise of 1.85μV×2 is superimposed on a fundamental waveform having an amplitude of0.13 V. That is, it corresponds to a case where the noise issuperimposed on the difference between potentials V2outa and V2outb(determination circuit). The reason why the voltage 1.85 μV is doubledis that, in the determination circuit 222, noises at the same leveldevelop in both the potentials V2outa and V2outb.

It is seen from these graphs that the S/N ratio is enhanced much morethan in the first embodiment.

(Fourth Embodiment)

Shown in FIG. 30 is a circuit diagram of a start signal output circuit201 in the fourth embodiment as is provided in such a way that, in thestart signal output circuit 200 of the second embodiment, thebinarization circuit 230 is replaced with the binarization circuit 130in the first embodiment.

More specifically, here, the wave-detector circuit of voltage doublerform (voltage doubler wave-detector circuit) in FIG. 16B is employed asa detection/amplification circuit 210, and the active loads (FIGS. 17and 18) constructed using the bipolar transistors Tr23 and Tr24 areadopted for the loads of the determination circuit 220. However, theoutput form of the determination circuit 220 is a two-output form, andregarding a low pass filter 140 further disposed at the succeeding stageof the binarization circuit 130, one of the same form as in theforegoing first embodiment (FIG. 1) is employed.

Here, signs in the figure in the fourth embodiment are as follows:

(Signs)

V1outa: DC input potential of determination circuit (reference side)

V1outb: DC input potential of determination circuit (sensing side)

V2outa: DC output potential of determination circuit (sensing side)

V2outb: DC output potential of determination circuit (reference side)

In order to verify the effectiveness of the start signal output circuit201, the simulation of a circuit operation was performed. In thesimulation, input power was given in a waveform obtained by subjecting acarrier of 5.8 GHz and −60 dBm to an ASK modulation at a width of 781μsec and a period of 2.343 msec. Further, a supply voltage Vcc wasassumed to be 3 V, and an operating current was assumed to be 28.8 μA.These values signify remarkably low power consumption, and they areactualized by the circuit arrangement of the start signal output circuit201 in FIG. 30.

Shown in FIG. 31A is the input DC potential of the determination circuit220. Further, shown in FIG. 31B is the spectrum (computed values) of theinput noise of the determination circuit 220. It is understood fromFIGS. 31A and 31B that, in the detection/amplification circuit 210 inFIG. 30, the amplitude is larger than in the first embodiment (FIGS. 9and 10), and that noise is lower. The reason why the amplitude becomeslarger, is the introduction of the voltage doubler wave-detectorcircuit. The reason why the noise becomes lower, is the alteration ofthe gate sizes of MOSFETs. The MOSFETs M1 and M2 in thedetection/amplification circuit 210 have gate widths of 5 μm and gatelengths of 10 μm. On the other hand, in the MOSFETs in the circuit ofthe first embodiment (FIG. 9), gate widths are 1.3 μm, and gate lengthsare 0.4 μm. That is, with the configuration in FIG. 31B, functions andadvantages owing to the seventh invention of the present application canbe appropriately achieved in proper quantities on the basis of, forexample, “RF CMOS circuit design technology” (written by Nobuyuki Itoh,and published by Kabushiki-Kaisha Triceps).

Shown in FIG. 32A is the output DC potential of the determinationcircuit 220. Further, shown in FIG. 32B is the spectrum of the outputnoise of the determination circuit 220. It is seen from these graphsthat, although the amplitude is much larger than in the prior art, thenoise whose DC component is 30 μV does not increase very much.

FIG. 33A is a graph obtained by modeling the input waveform of thedetermination circuit 220 with the conditions of FIGS. 31A and 31Bpremised. Therefore, noise of 40 nV is superimposed on the fundamentalwaveform having an amplitude of 7.16 mV. This corresponds to noise whichis superimposed on the potential V1outb (detection/amplification circuit210). In the input waveform of the determination circuit 220, theamplitude becomes larger than in the first embodiment (FIG. 12A), andthe absolute value of the noise becomes less.

Further, FIG. 33B is a graph obtained by modeling the outputcharacteristic (S/N ratio) of the determination circuit 220 in the casewhere radio frequency power is received, with the conditions of FIGS.32A and 32B premised. Therefore, noise of 30 μV is superimposed on afundamental waveform having an amplitude of 0.6 V. This corresponds to acase where the noise is superimposed on the difference between thepotentials V2outa and V2outb. Here, the voltage difference becomeslarger than in the first embodiment (FIG. 12B). Further, the absolutevalue of the noise becomes larger, but the influence thereof becomesless.

That is, likewise to FIGS. 10A and 10B–FIGS. 12A and 12B, these graphsindicate results obtained by simulating the ratios of the noises. Asdescribed above, it is understood that the much more excellent resultsthan in the first embodiment are respectively obtained in both thedetection/amplification circuit 210 and the determination circuit 220.Further, in the determination circuit 220, the noise value itself islarger than in the prior art, but the S/N ratio is greatly improved.

(Fifth Embodiment)

Shown in FIG. 34 is a circuit diagram of the whole start signal outputcircuit 301 in the fifth embodiment. Further, FIG. 35 is a circuitdiagram of a detection/amplification circuit 310 which forms the startsignal output circuit 301.

In a current mirror circuit which forms the outline of the start signaloutput circuit 301 in FIG. 35, a plurality of subsidiary transistorsconforming to one reference transistor are formed and arranged inparallel and into a multiple output type.

In case of, for example, such a circuit arrangement, the emitterterminals of all the transistors of the reference transistor and thesubsidiary transistors are respectively grounded (or connected to a feedpoint). Therefore, unless the temperature-dependent characteristics,etc. of the transistors are considered, the collector currents of therespective transistors are uniquely determined by only the potentials(bias voltages) of the base terminals of the transistors. Further, thecharacteristics of the transistors of the reference transistor and thesubsidiary transistors are identical, and the base terminals of therespective subsidiary transistors are connected with the base terminalof the reference transistor. Therefore, the bias voltages of therespective subsidiary transistors agree with the bias voltage V_(B-CM)of the reference transistor.

Accordingly, the collector currents of the subsidiary transistors arealways controlled to the same quantities as the collector current of thereference transistor.

Further, the emitter terminal of a transistor TrL which amplifies the DCcomponent I_(Q1) of a current outputted by a sensing diode Q1 isconnected to the collector terminal of the subsidiary transistor, sothat the emitter current of the transistor TrL substantially agrees withthe collector current of the subsidiary transistor.

According to such a circuit arrangement, all the transistors which formthe start signal output circuit of this embodiment can be driven by asingle current source. Accordingly, the bias voltages of all thetransistors lower uniformly with the lowering of a supply voltage. Inconsequence, the start signal output circuit of this embodiment canstably operate even in a case where the supply voltage lowers. That is,the start signal output circuit of this embodiment is highly immune tolowering in temperature, deterioration in a battery, etc., and it has awide operable range versus the supply voltage.

Moreover, according to such a circuit arrangement, the emitter currentto flow through the transistor TrL can be suppressed to a sufficientlysmall value as desired, by utilizing the function of the current mirrorcircuit, that is, by adjusting and setting the load R0 of the referencetransistor to a large resistance. Accordingly, a large-area resistanceof MΩ order which has a problematic parasitic component incurring anaction equivalent to a capacitor, a grounding resistance or the likeneed not be directly used on a wave-detector circuit. That is, such ahigh resistance may be indirectly disposed outside the wave-detectorcircuit as the load of the reference transistor. Thus, it is permittedto effectively eliminate the above problem of radio frequency leakage.

More specifically, with an ordinary diode wave-detector circuit as shownin FIG. 36 or FIG. 37, when a current is to be lowered, a resistancebecomes very high, so that the circuit is unsuitable for integration. Incontrast, according to this embodiment as described above, theintegration (miniaturization) and the lowered current (lowered powerconsumption) can be simultaneously and easily realized by employing thetransistors.

In other words, a large resistance component which corresponds to theresistance R2 of the prior art start signal output circuit 900 in FIG.38 can be, in fact, generated by resistance components which areincluded in the subsidiary transistor Tr5 forming one principal part ofthe current mirror circuit, and the transistor TrL described above.Therefore, the emitter current I_(E) of the transistor TrL can beconfined to the order of μA by utilizing such an operation. That is,according to such a configuration, the base current of the transistorTrL becomes the order of several tens nA surely, with the result thatthe bias of the low current can be automatically applied to thetransistor TrL.

In the case of, for example, the detection/amplification circuit 310 inFIG. 35, the bias current which is fed from the feed point (Vcc) andwhich is always flowing to the ground point via the diode-connectedtransistor (D1), the sensing diode Q1, the transistor TrL and thesubsidiary transistor Tr5 is in substantial agreement with the basecurrent of the above transistor TrL while radio frequency power is notinputted to the detection/amplification circuit 310. That is, a highresistance is realized by the connection of the sensing diode Q1 and thetransistor TrL. Thus, according to this embodiment, the quantity of thebase current can be effectively confined to a desired value withoutemploying directly on the wave-detector circuit, the large-arearesistance of MΩ order which has the parasitic component capable ofincurring the problem of the radio frequency leakage.

Further, the quantity of the base current is effectively confined to thesuitable value, whereby the following advantages can be naturallyattained:

-   (1) The rectification action of the sensing diode Q1 can be    optimized for the RF input (minute power).-   (2) Accordingly, in a case where a smoothing capacitor (with or    without a resonator) or the like is arranged posteriorly to the    sensing diode Q1, only the component (DC component I_(Q1)) near the    direct current of a sensed current outputted from the sensing diode    Q1 can be effectively amplified at a gain higher relatively to the    gains of the other frequency values, when the sensing current is    inputted to the base terminal of the transistor TrL.-   (3) The power consumption of the wave-detector circuit    (detection/amplification circuit) can be effectively suppressed.

Such functions and advantages based on the first or second invention ofthe present application are, of course, attained in the first to fourthembodiments described before. That is, the range of an operable batteryvoltage is expanded owing to the single supply voltage based on thecurrent mirror circuit. Further, in connecting an amplification circuitfor the DC potential (DC), a bandwidth limitation function is affordedby lowering the current of the amplification circuit on the basis of aconfiguration as described above. Further, the bandwidth limitationfunction is intensified by disposing a filter circuit at a stage prioror posterior to the amplification circuit, whereby the sensitivity ofthe amplification circuit for the vicinity of the outputted DC potential(DC) can be enhanced by the bandwidth limitation. That is, according tothe first and second inventions, the lowered power consumption and theenhanced sensitivity of the amplification circuit are compatible.Accordingly, the start signal output circuit of high sensitivity whichis free from the radio frequency leakage attendant upon the connectionof the high resistance can be easily realized by the circuit arrangementof low power consumption.

Furthermore, when the plurality of subsidiary transistors (Tr5, Tr9, . .. ) are arranged in parallel and into the multiple output type byemploying the current mirror circuit as described above, a similar equalcurrent control can be simultaneously performed for a circuit at thenext stage or at a further succeeding stage, for example, anamplification circuit. More specifically, according to such a circuitarrangement, the bias voltage controls of the whole circuit, includingthe detection/amplification circuit and the other succeeding circuit,are very easily and simply realized (organized and designed) in balancedfashion, and the bias voltages and currents of the whole circuit arestabilized in balanced fashion. It is therefore facilitated toeffectively prevent detection errors ascribable to the drift of thesupply voltage.

The features of the circuit arrangement of the start signal outputcircuit 301 (FIGS. 34 and 35) of Fifth embodiment are summed up asfollows:

-   (1) The detection/amplification circuit 310 is configured without    using any differential amplifier.-   (2) The start signal output circuit 301 is current-controlled    advantageously in balanced fashion by employing the current mirror    circuit.-   (3) An amplification circuit 320 at a intermediate stage is    configured by utilizing the circuit arrangement of the    detection/amplification circuit 210 in the second embodiment.-   (4) Preceding and succeeding the amplification circuit 320 at the    intermediate stage, capacitors C_(e1) and C_(e2) are respectively    inserted in series on a signal transfer path.-   (5) A buffer 325 is disposed at a stage preceding to a binarization    circuit 230 which makes a comparison and a determination.

FIG. 35 is a circuit diagram of the detection/amplification circuit 310of the start signal output circuit 301. A matching circuit MC in FIG. 35is configured including a capacitor C₀₀ which is connected and arrangedin series with the transfer path of a radio frequency signal from an RFinput end, a capacitor C₀ which is connected at one end to the outputend of the capacitor C₀₀ and which is grounded at the other end, an openhalf stub S_(H) which is connected at one end to the output end of thecapacitor C₀₀ and which is not closed at the other end, and a stub Swhich is connected at one end to the output end of the capacitor C₀₀,which is arranged in series on the above transfer path and whose otherend serves as the output end of the matching circuit MC.

That is, the matching circuit MC includes the capacitor C₀₀ in seriestherein, whereby a voltage doubler wave-detector circuit is incorporatedin the detection/amplification circuit 310 as in thedetection/amplification circuit 210 in the second embodiment describedbefore. Further, the current which is fed from the feed point (Vcc) andwhich is always flowing to the ground point via the diode-connectedtransistor (D1), sensing diode Q1, transistor TrL and subsidiarytransistor Tr5 is in substantial agreement with the base current of theabove transistor TrL. Also in this respect, the detection/amplificationcircuit 310 is configured similarly to the foregoingdetection/amplification circuit 210.

The operating principle of the detection/amplification circuit 310 (FIG.35) is as described below.

The base terminals and emitter terminals of the reference transistor Tr6and subsidiary transistor Tr5 are respectively connected to each other,so that the collector currents I_(ref) and I_(c) of the respectivetransistors become equal. When an RF input is received, the radiofrequency power is subjected to voltage doubler rectification by theelements D1 and Q1, and hence, the base current I_(Q1) of the transistorTrL increases. Accordingly, a current I_(e) flowing through the resistorRL on this occasion increases. Since, however, the collector currentI_(c) of the subsidiary transistor Tr5 is always regulated so as toagree with the collector current I_(ref), the increment of the currentI_(e) charges the smoothing capacitor Ca, and it further flows into theamplification circuit at the next stage (amplification circuit 320 inFIG. 34), so that the potential of a point A rises correspondingly.

It is also allowed to adopt a circuit arrangement in which, instead ofusing the potential of the point A as the output potential of thedetection/amplification circuit 310 (FIG. 35), the potential of theemitter terminal of the transistor TrL (a point G in FIG. 35) is set asthe output potential of the detection/amplification circuit 310. Whenthe radio frequency power is received, the resistance of the transistorTrL is lowered by the DC component I_(Q1) of the current outputted bythe sensing diode Q1, and hence, the potential of the point G rises.Accordingly, this potential can also be used as a detection signal.

Alternatively, a circuit of the same configuration as that of thecircuit between the supply voltage and the ground as is configured ofthe diode D1, sensing diode Q1, transistor TrL, subsidiary transistorTr5 and resistor RL in FIG. 35 may well be further prepared separatelyso as to connect both the circuits in parallel between the supplyvoltage and the ground and to differentially output the potentialdifference between both the G points of the two circuits. Of course, inthis case, the matching circuit MC is not connected on the side of thecircuit which is added in parallel anew. In this case, accordingly, thediode Q1 on the side of the circuit which is added in parallel anewoperates as a non-sensing diode.

Next, there will be explained the functions of the capacitors Ce1 andCe2 which are arranged between the respective stages in the arrangementof the start signal output circuit 301 (FIG. 34).

The amplification circuit 320 is connected with thedetection/amplification circuit 310 through the capacitor C_(e1). Thecutoff frequency f_(c) of a signal which can be inputted to theamplification circuit 320 is determined by the input impedance of thisamplification circuit 320 and the capacitor C_(e1). That is, thecapacitor C_(e1) achieves the function of forming a high-pass filter.

Accordingly, when a target radio frequency input intermittently arrivesat an intermittent period of, for example, about 1/300 second in a casewhere the cutoff frequency f_(c) is set at, for example, about 40 Hz,the frequency of the intermittent operation of the arrival of the radiofrequency input is much higher than the cutoff frequency f_(c). Even onsuch an occasion, therefore, a desired amplification function can beattained by the amplification circuit 320.

Further, according to such a configuration, it is possible toeffectively avoid or moderate the phenomenon that low frequency noise(example: flicker noise), an unexpected DC offset, or the like istransmitted from the preceding stage to the intermediate stage, or fromthe intermediate stage to the succeeding stage of the start signaloutput circuit. Therefore, a high S/N ratio can be attained.

The input end of the buffer 325 is connected with the output end of theamplification circuit 320 through the capacitor C_(e2). The capacitorC_(e2) has a capacitance being approximately equal to that of thecapacitor C_(e1), and it achieves a high-pass filter forming functionsimilar to that of the capacitor C_(e1).

The buffer 325 has a known configuration, and the binarization circuit230 is the same as in the second embodiment described before.

Even when the differential amplifier is not always introduced into thedetection/amplification circuit (310) in this manner by way of example,the functions and advantages of the present invention can be attained onthe basis of the first means thereof.

[Other Modified Embodiments]

The mode for carrying out the present invention is not restricted to theforegoing embodiments, but it may well be further modified asexemplified below. The advantages of the invention can be attained onthe basis of the functions thereof even by such modifications orapplications.

(Modified First Embodiment)

By way of example, in the foregoing second embodiment, a stub or aresonator should more desirably be added on the side of that secondterminal of the sensing diode to which the radio frequency power isoutputted (example: point A in FIG. 14), in such a manner that bothterminals of the additional stub or resonator are short-circuited for atarget frequency which is to be received. Desired radio frequency powercan be efficiently applied onto the side of that first terminal of thesensing diode to which the radio frequency power is inputted, byadopting a configuration in which the sensing diode is held between thematching circuit and the resonator or the like by way of example.

More concretely, the resonance circuits (Reso) which are disposed in,for example, the detection/amplification circuit in FIGS. 1 and 2 shouldessentially be preferably included also in the detection/amplificationcircuit 210. The resonance circuits (Reso) are designed so that thecorresponding parts may be short-circuited for the radio frequencyto-be-detected, and wave detection sensitivity is enhanced by disposingthe resonance circuits (Reso).

Further, a differential amplifier may be combined with a low pass filterby utilizing the fact that the function of low pass filtering isattained in case of operating the differential amplifier at a lowcurrent, or such differential amplifiers may be disposed into aplurality of stages, whereby only a bandwidth of at most 1/1000 ascompared with the bandwidth of the radio frequency signal is transmittedand amplified. This is more effective in the invention. That is, onlythe bandwidth in the vicinity of direct current within the bandwidth ofthe radio frequency is subjected to the low pass filtering andamplification, so that a sensitivity can be enhanced much more than inthe prior art diode wave detection.

Further, in order to remove the unnecessary waves of radio frequencycomponents, a transfer function should desirably decrease monotonouslyversus the frequency.

Further, not only an ordinary semiconductor diode, but also any otherelement functioning as a diode can be employed as the sensing diode ofthe invention. In this regard, especially in the case where the N-P-Ntype transistor or P-N-P type transistor is adopted in accordance withthe eleventh invention of the present application, the miniaturizationof an integrated circuit or the design of the bias potentials or biascurrents of various circuit parts is facilitated.

INDUSTRIAL APPLICABILITY

The present invention relates to a start signal output circuit having anRF/DC conversion circuit to which radio frequency power (RF) is inputtedand from which a direct current potential (DC) is outputted, and adetermination circuit which is useful for the start signal outputcircuit, etc. The start signal output circuit of the invention isapplicable to mobile communication devices, and an ETC, a “smart plate”,a LAN, a monitoring system, a key-free system for vehicles, etc. asfields in which the mobile communication devices in that case aresuitable.

1. A start signal output circuit having an RFIDC conversion circuit to which radio frequency power (RF) of specified frequency is inputted and from which a direct current potential (DC) is outputted, the start signal output circuit comprising: a detection/amplification circuit which includes: a sensing diode Q1 for sensing the radio frequency power; a transistor TrL for amplifying a direct current component I_(Q1) of a current outputted by the sensing diode 01; and a current mirror circuit including the transistor TrL as a circuit element, wherein a base current I_(B) of the transistor TrL is in agreement with the direct current component I_(Q1), and an emitter current I_(E) of the transistor TrL is limited by the current mirror circuit.
 2. The start signal output circuit as defined in claim 1, wherein the current mirror circuit includes: a reference transistor which has its emitter terminal connected to a predetermined ground point or feed point, and which is endowed with a predetermined load thereby to determine a current quantity of the whole start signal output circuit; and a plurality of subsidiary transistors which has emitter terminals connected to the emitter terminal of the reference transistor, and which has respective base terminals connected to a base terminal of the reference transistor thereby to pass currents in quantities identical to a current quantity of the reference transistor, respectively.
 3. The start signal output circuit as defined in claim 1, further comprising: a differential amplifier, wherein the transistor TrL forming one of differential pair transistors which are arranged in a signal input portion of the differential amplifier, and a total of currents flowing through the differential amplifier is regulated to a constant value by the current mirror circuit.
 4. The start signal output circuit as defined in claim 3, wherein: a non-sensing diode Q2 which does not sense the radio frequency power is disposed in symmetry to the sensing diode Q1 at least logically; and a cathode terminal of the non-sensing diode Q2 outputs the same voltage as a cathode terminal voltage of the sensing diode Q1 to a base terminal of the other TrR of the differential pair transistors, while the radio frequency power is not inputted to the start signal output circuit.
 5. The stan signal output circuit as defined in claim 4, wherein a whole circuit form of a differential circuit centering around the differential amplifier is configured in symmetry.
 6. The start signal output circuit as defined in claim 3, wherein loads of the differential amplifier are active loads of current mirror circuit configuration including two MOSFETs.
 7. The stan signal output circuit as defined in claim 6; wherein each of the MOSFETs has a gate length of at least 1 μm, and a gate width of at least 2 μm.
 8. The start signal output circuit as defined in claim 1, wherein a matching circuit for efficiently inputting the radio frequency power is connected to a first terminal side of the sensing diode Q1 to which the radio frequency power is inputted.
 9. The start signal output circuit as defined of claim 1, wherein a stub or a resonator is connected to a second terminal side of the sensing diode Q1 to which the radio frequency power is outputted, so that both terminals of the stub or the resonator may be short-circuited for the specified frequency.
 10. The start signal output circuit as defined in claim 1, wherein the sensing diode Q1 is constructed of a transistor of N-P-N type or P-N-P type whose base and collector are directly connected as the first terminal of the sensing diode Q1 to which the radio frequency power is inputted, and whose emitter is used as the second terminal of the sensing diode Q1 to which the radio frequency power is outputted.
 11. The start signal output circuit as defined in claim 1, wherein the detection/amplification circuit includes a voltage doubler wave-detector circuit which is configured in such a way that an output end of a capacitor C1 located in an input portion for the radio frequency power, and a cathode end of a diode D1 having its anode end grounded radio-frequency-wise are connected to an anode end of the sensing diode Q1, and that one end of a capacitor C2 having its other end wounded radio-frequency-wise is connected to a cathode end of the sensing diode Q1.
 12. The stan signal output circuit as defined in claim 1, wherein a binarization circuit configured using CMOS is disposed at a succeeding stage, and that the binarization circuit binarizes an output signal of the start signal output circuit.
 13. A determination circuit comprising: a differential amplifier that is in symmetry logically, and which compares an input level with a reference potential, wherein that regarding a pair of load resistances Ra and Rb which oppose to each other in substantial symmetry at least logically, and which regulate currents to flow through the differential amplifier, while constituting a load portion of the differential amplifier, the load resistance Ra on an input fluctuation side whose input level fluctuates in correspondence with existence or nonexistence of an input of the radio frequency power is set lower than the load resistance Rb on a determination criterion input side.
 14. The determination circuit as defined in claim 13, wherein a difference □R(≡Rb−Ra>0) between the load resistance Ra and the load resistance Rb is variably adjustable, thereby to freely set a sensitivity of an output potential to an input potential.
 15. A determination circuit comprising: a differential amplifier that is in symmetry logically, and which compares an input level with a reference potential, wherein a load portion of the differential amplifier for regulating currents flowing through the differential amplifier has a current minor circuit configuration, and is configured of asymmetric active loads.
 16. The determination circuit as defined in claim 15, wherein the active loads includes two bipolar transistors.
 17. The determination circuit as defined in claim 13, wherein the differential amplifier includes two sets of amplification circuits each of which is configured by Darlington-connected two transistors, the two sets being opposed to each other in substantial symmetry at least logically.
 18. The determination circuit as defined in claim 13, wherein a binarization circuit configured using CMOS is disposed at a succeeding stage, and the binarization circuit binarizes a determined result outputted by the determination circuit.
 19. A start signal output circuit having an RF/DC conversion circuit to which radio frequency power (RF) of specified frequency is inputted, and from which a direct current potential (DC) is outputted, comprising: the determination circuit as defined in claim
 13. 20. The start signal output circuit as defined in claim 1, comprising: the determination circuit as defined in claim
 13. 21. The start signal output circuit as defined in claim 1, further comprising: a low pass filter or a low band amplification circuit which is configured using a stub, a resonator, an inductor or a smoothing capacitor, whereby regarding a transfer function of the direct current potential (DC) for a detected potential (,, v) of the sensing diode Q1, a narrow band low pass filter characteristic which sharply monotonously decreases especially in a vicinity of a direct current versus frequency values is afforded.
 22. The determination circuit as defined in claim 15, wherein the differential amplifier includes two sets of amplification circuits each of which is configured by Darlington-connected two transistors, the two sets being opposed to each other in symmetry at least logically.
 23. The determination circuit as defined in claim 15, wherein a binarization circuit configured using CMOS is disposed at a succeeding stage, and the binarization circuit binarizes a determined result outputted by the determination circuit.
 24. A start signal output circuit having an RF/DC conversion circuit to which radio frequency power (RF) of specified frequency is inputted, and from which a direct current potential (DC) is outputted, comprising: the determination circuit as defined in claim
 15. 25. The start signal output circuit as defined in claim 1, comprising: the determination circuit as defined in claim
 15. 26. The stan signal output circuit as defined claim 19, further comprising: a low pass filter or a low band amplification circuit which is configured using a stub, a resonator, an inductor or a smoothing capacitor, whereby regarding a transfer function of the direct current potential (DC) for a detected potential (,, v) of the sensing diode Q1, a narrow band low pass filter characteristic which sharply monotonously decreases especially in a vicinity of a direct current versus frequency values is afforded.
 27. The start signal output circuit as defined in claim 24, further comprising: a low pass filter or a low band amplification circuit which is configured using a stub, a resonator, an inductor or a smoothing capacitor, whereby regarding a transfer function of the direct current potential (DC) for a detected potential (,, v) of the sensing diode Q1, a narrow band low pass filter characteristic which sharply monotonously decreases especially in a vicinity of a direct current versus frequency values is afforded.
 28. The start signal output circuit as defined in claim 20, further comprising: a low pass filter or a low band amplification circuit which is configured using a stub, a resonator, an inductor or a smoothing capacitor, whereby regarding a transfer function of the direct current potential (DC) for a detected potential (,, v) of the sensing diode Q1, a narrow band low pass filter characteristic which sharply monotonously decreases especially in a vicinity of a direct current versus frequency values is afforded.
 29. The start signal output circuit as defined in claim 25, further comprising: a low pass filter or a low band amplification circuit which is configured using a stub, a resonator, an inductor or a smoothing capacitor, whereby regarding a transfer function of the direct current potential (DC) for a detected potential (,, v) of the sensing diode Q1, a narrow band low pass filter characteristic which sharply monotonously decreases especially in a vicinity of a direct current versus frequency values is afforded. 